TTA-based Co-design Environment (TCE) tools

TTA-based Co-Design Environment (TCE) is an open application-specific instruction-set toolset. It can be used to design and program customized processors based on the energy efficient Transport Triggered Architecture (TTA). The toolset provides a complete retargetable co-design flow from high-level language programs down to synthesizable processor RTL (VHDL and Verilog backends supported) and parallel program binaries. Processor customization points include the register files, function units, supported operations, and the interconnection network.

TCE development is led by the Customized Parallel Computing (CPC) group at the Tampere University, Finland. Further reading: LLVM project blog post about TCE.

News and updates

June 9th, 2022: TCE 1.25 released

A new version of the toolset is now available for download.

See the release announcement and the change summary for details. Install instructions.

July 23rd, 2018: A tutorial slide deck with clickable videos uploaded

The slide set (39M) contains clickable videos and goes through most of the tool set. It was first presented in OpenSuco 3 workshop organized within the ISC High Performance 2018 conference (June 28th in Frankfurt, Germany).

October 4th, 2017: TCE-based demo featured on the lab's blog

A demonstration featuring a neural network coprocessor designed with TCE was shown at CIVIT.

For more info, read the post on the Pervasive Computing blog.

May 17th, 2017: New publications added

(older news here)

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