This is the complete list of members for llvm::TCEInstrInfo, including all inherited members.

analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock &TBB, MachineBasicBlock &FBB, llvm::SmallVectorImpl< llvm::MachineOperand > &cond, bool allowModify=false) const override	llvm::TCEInstrInfo	virtual
analyzeLoopForPipelining(MachineBasicBlock *LoopBB) const override	llvm::TCEInstrInfo
BlockHasNoFallThrough(const MachineBasicBlock &MBB) const	llvm::TCEInstrInfo	virtual
ClobbersPredicate(MachineInstr &MI, std::vector< MachineOperand > &Pred, bool SkipDead) const override	llvm::TCEInstrInfo	virtual
copyPhysReg(MachineBasicBlock &mbb, MachineBasicBlock::iterator mbbi, const DebugLoc &DL, MCRegister destReg, MCRegister srcReg, bool KillSrc) const override	llvm::TCEInstrInfo	virtual
copyPhysVectorReg(MachineBasicBlock &mbb, MachineBasicBlock::iterator mbbi, const DebugLoc &DL, MCRegister destReg, MCRegister srcReg, bool killSrc) const	llvm::TCEInstrInfo	private
CreateTargetScheduleState(const TargetSubtargetInfo &) const override	llvm::TCEInstrInfo	virtual
getInstrItineraryData() const	llvm::TCEInstrInfo	inline
getMatchingCondBranchOpcode(int Opc, bool inverted) const	llvm::TCEInstrInfo	private
getPointerAdjustment(int offset) const	llvm::TCEInstrInfo
getRegisterInfo() const	llvm::TCEInstrInfo	inlinevirtual
insertBranch(MachineBasicBlock &MBB, MachineBasicBlock TBB, MachineBasicBlock FBB, ArrayRef< MachineOperand > Cond, const DebugLoc &DL, int *BytesAdded=nullptr) const override	llvm::TCEInstrInfo	virtual
insertCCBranch(MachineBasicBlock &mbb, MachineBasicBlock &tbb, ArrayRef< MachineOperand > cond, const DebugLoc &dl) const	llvm::TCEInstrInfo	virtual
InstrItins	llvm::TCEInstrInfo	private
isPredicable(const MachineInstr &MI) const override	llvm::TCEInstrInfo	virtual
isPredicated(const MachineInstr &MI) const override	llvm::TCEInstrInfo	virtual
isProfitableToIfCvt(MachineBasicBlock &MBB, unsigned NumCycles, unsigned ExtraPredCycles, BranchProbability Probability) const override	llvm::TCEInstrInfo	virtual
isProfitableToIfCvt(MachineBasicBlock &TMBB, unsigned NumTCycles, unsigned ExtraTCycles, MachineBasicBlock &FMBB, unsigned NumFCycles, unsigned ExtraFCycles, BranchProbability Probability) const override	llvm::TCEInstrInfo	virtual
loadRegFromStackSlot(MachineBasicBlock &mbb, MachineBasicBlock::iterator mbbi, unsigned destReg, int frameIndex, const TargetRegisterClass *rc, Register vReg) const	llvm::TCEInstrInfo	virtual
loadRegFromStackSlot(MachineBasicBlock &mbb, MachineBasicBlock::iterator mbbi, Register destReg, int frameIndex, const TargetRegisterClass rc, const TargetRegisterInfo , Register vReg) const override	llvm::TCEInstrInfo	inlinevirtual
plugin_	llvm::TCEInstrInfo	private
PredicateInstruction(MachineInstr &mi, ArrayRef< MachineOperand > cond) const override	llvm::TCEInstrInfo	virtual
removeBranch(MachineBasicBlock &mbb, int *BytesRemoved=nullptr) const override	llvm::TCEInstrInfo
reverseBranchCondition(llvm::SmallVectorImpl< llvm::MachineOperand > &cond) const override	llvm::TCEInstrInfo	virtual
ri_	llvm::TCEInstrInfo	private
storeRegToStackSlot(MachineBasicBlock &mbb, MachineBasicBlock::iterator mbbi, unsigned srcReg, bool isKill, int frameIndex, const TargetRegisterClass *rc, Register vReg) const	llvm::TCEInstrInfo	virtual
storeRegToStackSlot(MachineBasicBlock &mbb, MachineBasicBlock::iterator mbbi, Register srcReg, bool isKill, int frameIndex, const TargetRegisterClass rc, const TargetRegisterInfo , Register vReg) const override	llvm::TCEInstrInfo	inlinevirtual
SubsumesPredicate(ArrayRef< MachineOperand > Pred1, ArrayRef< MachineOperand > Pred2) const override	llvm::TCEInstrInfo	inlinevirtual
TCEInstrInfo(const TCETargetMachinePlugin *plugin)	llvm::TCEInstrInfo
~TCEInstrInfo()	llvm::TCEInstrInfo	virtual