| bitness() const | llvm::TCETargetMachine | inline |
| calculateSupportedImmediates() | llvm::TCETargetMachine | private |
| canEncodeAsMOVF(const llvm::APFloat &fp) const | llvm::TCETargetMachine | |
| canEncodeAsMOVI(const llvm::MVT &vt, int64_t val) const | llvm::TCETargetMachine | |
| canMaterializeConstant(const ConstantInt &ci) const | llvm::TCETargetMachine | inline |
| createMachine() | llvm::TCETargetMachine | |
| createPassConfig(PassManagerBase &PM) override | llvm::TCETargetMachine | virtual |
| customLegalizedOperations() | llvm::TCETargetMachine | |
| customLegalizedOps_ | llvm::TCETargetMachine | private |
| dataASName() | llvm::TCETargetMachine | inline |
| emulationModule_ | llvm::TCETargetMachine | |
| getAddOpcode(const llvm::EVT &vt) const | llvm::TCETargetMachine | inline |
| getDataLayout() const | llvm::TCETargetMachine | inlinevirtual |
| getFrameLowering() const | llvm::TCETargetMachine | inlinevirtual |
| getInstrInfo() const | llvm::TCETargetMachine | inlinevirtual |
| getIorOpcode(const llvm::EVT &vt) const | llvm::TCETargetMachine | inline |
| getLoadOpcode(int asid, int align, const llvm::EVT &vt) const | llvm::TCETargetMachine | |
| getMaxOpcode(llvm::SDNode *n) | llvm::TCETargetMachine | inline |
| getMaxuOpcode(llvm::SDNode *n) | llvm::TCETargetMachine | inline |
| getMinOpcode(llvm::SDNode *n) | llvm::TCETargetMachine | inline |
| getMinuOpcode(llvm::SDNode *n) | llvm::TCETargetMachine | inline |
| getRegisterInfo() const | llvm::TCETargetMachine | inlinevirtual |
| getShlOpcode(const llvm::EVT &vt) const | llvm::TCETargetMachine | inline |
| getSubtargetImpl() const | llvm::TCETargetMachine | inlinevirtual |
| getSubtargetImpl(const Function &) const override | llvm::TCETargetMachine | inlinevirtual |
| getTargetLowering() const | llvm::TCETargetMachine | inlinevirtual |
| getTargetTransformInfo(const Function &F) const override | llvm::TCETargetMachine | inline |
| has16bitLoads() const | llvm::TCETargetMachine | inline |
| has8bitLoads() const | llvm::TCETargetMachine | inline |
| hasOperation(TCEString operationName) const | llvm::TCETargetMachine | inline |
| isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const override | llvm::TCEBaseTargetMachine | inlinevirtual |
| largestImm_ | llvm::TCETargetMachine | private |
| largestImmValue() const | llvm::TCETargetMachine | inline |
| llvmRegisterId(const TCEString &ttaRegister) | llvm::TCETargetMachine | inline |
| loadPlugin() | llvm::TCETargetMachine | |
| missingOperations() | llvm::TCETargetMachine | |
| missingOps_ | llvm::TCETargetMachine | private |
| opcode(TCEString operationName) const | llvm::TCETargetMachine | inline |
| operationName(unsigned opc) const | llvm::TCETargetMachine | inline |
| plugin_ | llvm::TCETargetMachine | private |
| pluginTool_ | llvm::TCETargetMachine | private |
| promotedOperations() | llvm::TCETargetMachine | |
| promotedOps_ | llvm::TCETargetMachine | private |
| raPortDRegNum() const | llvm::TCETargetMachine | inline |
| registerIndex(unsigned dwarfRegNum) const | llvm::TCETargetMachine | inline |
| registerName(unsigned dwarfRegNum) const | llvm::TCETargetMachine | inline |
| rfName(unsigned dwarfRegNum) const | llvm::TCETargetMachine | inline |
| setEmulationModule(Module *mod) | llvm::TCETargetMachine | inlinevirtual |
| setStackAlignment(unsigned align) | llvm::TCETargetMachine | inline |
| setTargetMachinePlugin(TCETargetMachinePlugin &plugin, TTAMachine::Machine &target) | llvm::TCETargetMachine | virtual |
| setTTAMach(const TTAMachine::Machine *mach) override | llvm::TCETargetMachine | inlinevirtual |
| smallestImm_ | llvm::TCETargetMachine | private |
| smallestImmValue() const | llvm::TCETargetMachine | inline |
| spDRegNum() const | llvm::TCETargetMachine | inline |
| stackAlignment() const | llvm::TCETargetMachine | inline |
| stackAlignment_ | llvm::TCETargetMachine | private |
| SupportedFPImmWidth_ | llvm::TCETargetMachine | private |
| targetPlugin() const | llvm::TCETargetMachine | inlinevirtual |
| TCEBaseTargetMachine(const Target &T, const Triple &TT, const llvm::StringRef &CPU, const llvm::StringRef &FS, const TargetOptions &Options, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) | llvm::TCEBaseTargetMachine | |
| TCETargetMachine(const Target &T, const Triple &TTriple, const llvm::StringRef &CPU, const llvm::StringRef &FS, const TargetOptions &Options, std::optional< Reloc::Model > RM, std::optional< CodeModel::Model > CM, CodeGenOpt::Level OL, bool isLittle) | llvm::TCETargetMachine | |
| ttaMach_ | llvm::TCEBaseTargetMachine | |
| ttaMachine() const | llvm::TCETargetMachine | inlinevirtual |
| validStackAccessOperation(const std::string &opName) const | llvm::TCETargetMachine | inline |
| ~TCETargetMachine() | llvm::TCETargetMachine | virtual |
