OpenASIP  2.0
llvm::TCETargetMachinePlugin Member List

This is the complete list of members for llvm::TCETargetMachinePlugin, including all inherited members.

adfXML()=0llvm::TCETargetMachinePluginpure virtual
analyzeCCBranch(llvm::MachineInstr &i, llvm::SmallVectorImpl< llvm::MachineOperand > &cond) constllvm::TCETargetMachinePlugininlinevirtual
canMaterializeConstant(const ConstantInt &ci) const =0llvm::TCETargetMachinePluginpure virtual
createISelPass(TCETargetMachine *tm)=0llvm::TCETargetMachinePluginpure virtual
dataASName()=0llvm::TCETargetMachinePluginpure virtual
dl_llvm::TCETargetMachinePluginprotected
extractElementLane(const MachineInstr &mi) const =0llvm::TCETargetMachinePluginpure virtual
extrasRegClass(const llvm::TargetRegisterClass *current) const =0llvm::TCETargetMachinePluginpure virtual
fpDRegNum()=0llvm::TCETargetMachinePluginpure virtual
frameInfo_llvm::TCETargetMachinePluginprotected
getAddOpcode(const llvm::EVT &vt) const =0llvm::TCETargetMachinePluginpure virtual
getCurrentTargetMachine()llvm::TCETargetMachinePlugininlinevirtual
getCurrentTargetMachine() constllvm::TCETargetMachinePlugininlinevirtual
getDataLayout() constllvm::TCETargetMachinePlugininlinevirtual
getDataLayout()llvm::TCETargetMachinePlugininlinevirtual
getDefaultType() const =0llvm::TCETargetMachinePluginpure virtual
getFalsePredicateOpcode(unsigned opc) const =0llvm::TCETargetMachinePluginpure virtual
getFrameLowering() const =0llvm::TCETargetMachinePluginpure virtual
getInstrInfo() const =0llvm::TCETargetMachinePluginpure virtual
getIorOpcode(const llvm::EVT &vt) const =0llvm::TCETargetMachinePluginpure virtual
getLoad(const TargetRegisterClass *rc) const =0llvm::TCETargetMachinePluginpure virtual
getLoadOpcode(const llvm::EVT &vt) const =0llvm::TCETargetMachinePluginpure virtual
getMaxOpcode(llvm::SDNode *n) const =0llvm::TCETargetMachinePluginpure virtual
getMaxuOpcode(llvm::SDNode *n) const =0llvm::TCETargetMachinePluginpure virtual
getMinOpcode(llvm::SDNode *n) const =0llvm::TCETargetMachinePluginpure virtual
getMinuOpcode(llvm::SDNode *n) const =0llvm::TCETargetMachinePluginpure virtual
getParamDRegNums() const =0llvm::TCETargetMachinePluginpure virtual
getPointerAdjustment(int offset) const =0llvm::TCETargetMachinePluginpure virtual
getRegisterInfo() const =0llvm::TCETargetMachinePluginpure virtual
getSelectionDAGInfo() constllvm::TCETargetMachinePlugininlinevirtual
getShlOpcode(const llvm::EVT &vt) const =0llvm::TCETargetMachinePluginpure virtual
getStore(const TargetRegisterClass *rc) const =0llvm::TCETargetMachinePluginpure virtual
getSubtarget() const =0llvm::TCETargetMachinePluginpure virtual
getTargetLowering() const =0llvm::TCETargetMachinePluginpure virtual
getTargetTransformInfo(const Function &F) const =0llvm::TCETargetMachinePluginpure virtual
getTruePredicateOpcode(unsigned opc) const =0llvm::TCETargetMachinePluginpure virtual
getVectorRVDRegNums() const =0llvm::TCETargetMachinePluginpure virtual
has16bitLoads() const =0llvm::TCETargetMachinePluginpure virtual
has8bitLoads() const =0llvm::TCETargetMachinePluginpure virtual
hasMUL() const =0llvm::TCETargetMachinePluginpure virtual
hasOperation(TCEString operationName) const =0llvm::TCETargetMachinePluginpure virtual
hasROTL() const =0llvm::TCETargetMachinePluginpure virtual
hasROTR() const =0llvm::TCETargetMachinePluginpure virtual
hasSDIV() const =0llvm::TCETargetMachinePluginpure virtual
hasSHL() const =0llvm::TCETargetMachinePluginpure virtual
hasSHR() const =0llvm::TCETargetMachinePluginpure virtual
hasSHRU() const =0llvm::TCETargetMachinePluginpure virtual
hasSQRTF() const =0llvm::TCETargetMachinePluginpure virtual
hasSREM() const =0llvm::TCETargetMachinePluginpure virtual
hasSXHW() const =0llvm::TCETargetMachinePluginpure virtual
hasSXQW() const =0llvm::TCETargetMachinePluginpure virtual
hasUDIV() const =0llvm::TCETargetMachinePluginpure virtual
hasUREM() const =0llvm::TCETargetMachinePluginpure virtual
instrInfo_llvm::TCETargetMachinePluginprotected
is64bit() const =0llvm::TCETargetMachinePluginpure virtual
isLittleEndian() const =0llvm::TCETargetMachinePluginpure virtual
llvmRegisterId(const TCEString &ttaRegister)=0llvm::TCETargetMachinePluginpure virtual
lowering_llvm::TCETargetMachinePluginprotected
maxVectorSize() const =0llvm::TCETargetMachinePluginpure virtual
nodeRegClass(unsigned nodeId, const llvm::TargetRegisterClass *current) const =0llvm::TCETargetMachinePluginpure virtual
opcode(TCEString operationName) const =0llvm::TCETargetMachinePluginpure virtual
operationName(unsigned opc) const =0llvm::TCETargetMachinePluginpure virtual
raPortDRegNum()=0llvm::TCETargetMachinePluginpure virtual
registerIndex(unsigned dwarfRegNum)=0llvm::TCETargetMachinePluginpure virtual
registerTargetMachine(TCETargetMachine &tm)=0llvm::TCETargetMachinePluginpure virtual
rfName(unsigned dwarfRegNum)=0llvm::TCETargetMachinePluginpure virtual
rvDRegNum()=0llvm::TCETargetMachinePluginpure virtual
rvHighDRegNum()=0llvm::TCETargetMachinePluginpure virtual
spDRegNum()=0llvm::TCETargetMachinePluginpure virtual
subTarget_llvm::TCETargetMachinePluginprotected
TCETargetMachinePlugin()llvm::TCETargetMachinePlugininline
tm_llvm::TCETargetMachinePluginprotected
tsInfo_llvm::TCETargetMachinePluginprotected
validStackAccessOperation(const std::string &opName) const =0llvm::TCETargetMachinePluginpure virtual
~TCETargetMachinePlugin()llvm::TCETargetMachinePlugininlinevirtual
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