Transport triggering: Principles and consequences
Prof. Henk Corporaal, IMEC, Leuven, Belgium / Eindhoven Univ. Tech., Eindhoven, the Netherlands
Instruction scheduling for TTAs
PhD. Andrea Cilio, Delft Univ. Technology, Delft, the Netherlands
Integrated assignment for TTAs
PhD. Johan Janssen, TNO, den Hague, the Netherlands
FlexDSP project and roadmap
Prof. Jarmo Takala, Tampere University of Technology, Tampere, Finland
System house expectations for flexible processors
Jari Parviainen, Nokia Mobile Phones, Oulu, Finland
Experiments with TTAs and requirements for design tools
Steven Pekarich, Texas Instruments, Dallas, TX, USA
TTA implementations with standard cell technology
Mr. Jaakko Sertamo, Tampere Univ. Tech., Tampere, Finland
Analysis of TTA performance / Code compression
M.Sc. Jari Heikkinen, Tampere Univ. Tech., Tampere, Finland
Bus Structures in TTA
M.Sc. Raimo Mäkelä, Tampere Univ. Tech., Tampere, Finland
Possibilities for code reorganization in TTAs
M.Sc. Vladimir Guzma, Tampere Univ. Tech., Tampere, Finland
Early estimation of processor performance
M.Sc. Tero Nurmi, University of Turku, Turku, Finland
Evaluating TTA and other novel architectures with telecommunications workloads
PhD. Martti Forsell, VTT-Electronics, Oulu, Finland
Fast Evaluation of Protocol Processor Architectures for IPv6 Routing
PhD Student Dragos Truscan, Turku Center for Computer Science, Turku, Finland