OpenASIP 2.2
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Go to the source code of this file.
Namespaces | |
namespace | ProGe |
Enumerations | |
enum | ProGe::HDL { ProGe::VHDL =0 , ProGe::Verilog } |
HDLs supported by ProGe. More... | |
enum | ProGe::DataType { ProGe::BIT , ProGe::BIT_VECTOR } |
Data types of hardware ports. More... | |
enum | ProGe::Direction { ProGe::IN , ProGe::OUT , ProGe::BIDIR } |
Direction of the port. More... | |