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86 if (busNav.
count() == 0 || brNav.
count() > 0) {
103 for (
int so = 0; so < socketNav.
count(); so++) {
113 for (
int i = 0; i < fuNav.
count(); i++) {
127 for (
int i = 0; i < iuNav.
count(); i++) {
129 for (
int p = 0; p < iu.
portCount(); p++) {
140 for (
int i = 0; i < rfNav.
count(); i++) {
142 for (
int p = 0; p < rf.
portCount(); p++) {
178 for (
int so = 0; so < socketNav.
count(); so++) {
182 *
this,
"All sockets not connected to all busses.");
190 for (
int i = 0; i < fuNav.
count(); i++) {
196 *
this,
"FU: '" + fu.
name() +
"' port '" +
197 port.
name() +
"' not connected to any socket.");
207 for (
int i = 0; i < iuNav.
count(); i++) {
209 for (
int p = 0; p < iu.
portCount(); p++) {
213 *
this,
"IU: '" + iu.
name() +
"' port '" +
214 port.
name() +
"' not connected to any socket.");
223 for (
int i = 0; i < rfNav.
count(); i++) {
225 for (
int p = 0; p < rf.
portCount(); p++) {
229 *
this,
"RF: '" + rf.
name() +
"' port '" +
230 port.
name() +
"' not connected to any socket.");
242 *
this,
"GCU port '" +
243 port.
name() +
"' not connected to any socket.");
251 *
this,
"GCU port '" +
252 port.
name() +
"' not connected to any socket.");
271 "Machines contains no busses or contains bridges.");
277 for (
int so = 0; so < socketNav.
count(); so++) {
284 for (
int i = 0; i < fuNav.
count(); i++) {
298 for (
int i = 0; i < iuNav.
count(); i++) {
300 for (
int p = 0; p < iu.
portCount(); p++) {
311 for (
int i = 0; i < rfNav.
count(); i++) {
315 bool lastWasReadPort =
false;
316 for (
int p = 0; p < rf.
portCount(); p++) {
322 }
else if (maxWrites > 0) {
328 if (lastWasReadPort) {
330 lastWasReadPort =
false;
333 lastWasReadPort =
true;
348 "Port connected to unknown socket.");
463 std::string socketName = unit.
name();
464 if (direction == Socket::INPUT) {
465 socketName = socketName +
"_i";
467 socketName = socketName +
"_o";
510 for (
int c = 0; c < operation.
latency(); c++) {
529 for (
int c = 0; c < operation.
latency(); c++) {
559 for (
int b = 0; b < busNav.
count(); b++) {
588 for (
int b = 0; b < busNav.
count(); b++) {
virtual bool canConnect(const TTAMachine::Socket &socket, const TTAMachine::Segment &segment)
virtual Socket * inputSocket() const
virtual TCEString name() const
TTAMachine::Machine * machine
the architecture definition of the estimated processor
FunctionUnit * parentUnit() const
virtual bool canFix(const TTAMachine::Machine &mach) const
void addError(const MachineCheck &check, const std::string &errorMsg)
virtual Segment * segment(int index) const
virtual int maxWrites() const
static std::string toString(const T &source)
virtual std::string fix(TTAMachine::Machine &mach) const
virtual int socketCount() const
virtual void attachSocket(Socket &socket)
virtual ControlUnit * controlUnit() const
virtual int maxReads() const
void attachBus(Segment &bus)
virtual BridgeNavigator bridgeNavigator() const
virtual ImmediateUnitNavigator immediateUnitNavigator() const
SpecialRegisterPort * specialRegisterPort(int index) const
bool hasItem(const std::string &name) const
bool isPortWritten(const FUPort &port, int cycle) const
int specialRegisterPortCount() const
virtual FunctionUnitNavigator functionUnitNavigator() const
virtual void setMachine(Machine &mach)
void attachSocketToAllBusses(TTAMachine::Socket &socket) const
virtual int operationCount() const
virtual SocketNavigator socketNavigator() const
void setDirection(Direction direction)
virtual int operationPortCount() const
bool isConnectedTo(const Bus &bus) const
virtual int portCount() const
virtual bool check(const TTAMachine::Machine &mach) const
void connectSpecialRegisterPort(TTAMachine::SpecialRegisterPort &port) const
bool isPortRead(const FUPort &port, int cycle) const
virtual RFPort * port(const std::string &name) const
BaseRegisterFile * parentUnit() const
virtual RegisterFileNavigator registerFileNavigator() const
virtual Machine * machine() const
virtual std::string name() const
virtual ~FullyConnectedCheck()
void connectIUPort(TTAMachine::RFPort &port) const
virtual BusNavigator busNavigator() const
void connectRFPort(TTAMachine::RFPort &port, TTAMachine::Socket::Direction direction) const
virtual Socket * outputSocket() const
void connectFUPort(TTAMachine::FUPort &port) const
ExecutionPipeline * pipeline() const
ComponentType * item(int index) const
virtual HWOperation * operation(const std::string &name) const
virtual FUPort * operationPort(const std::string &name) const
void connectControlUnit(TTAMachine::ControlUnit &gcu) const
virtual int segmentCount() const
TTAMachine::Socket * createSocket(const TTAMachine::Unit &unit, TTAMachine::Socket::Direction direction) const
bool socketAttachedToAllBusses(const TTAMachine::Socket &socket) const