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34 #include <boost/format.hpp>
54 const string CALL =
"CALL";
55 const string JUMP =
"JUMP";
84 for (std::set<ErrorCode>::const_iterator iter = errorsToCheck.begin();
85 iter != errorsToCheck.end(); iter++) {
122 string errorMsg =
"The machine does not have a GCU.";
142 string errorMsg =
"The GCU does not have an address space.";
159 for (
int i = 0; i < fuNav.
count(); i++) {
193 if (pcPort1 != NULL && pcPort2 != NULL && pcPort1 != pcPort2) {
195 "Operands of JUMP and CALL operations are not bound to the "
220 if (pcPort == NULL) {
222 "Operand 1 of CALL operation is not bound to any port.";
230 if (pcPort == NULL) {
232 "Operand 1 of JUMP operation is not bound to any port.";
256 "GCU does not have return address port which is needed by "
285 if (pcPort != NULL && pcPort->
width() != raPort->
width()) {
286 string errorMsg =
"PC and RA ports have unequal width.";
293 if (pcPort != NULL && pcPort->
width() != raPort->
width()) {
294 string errorMsg =
"PC and RA ports have unequal width.";
326 if (raPort->
width() != addrWidth) {
328 "Return address port has different width than "
329 "instruction memory address.";
337 pcPort = jumpOp->
port(1);
341 pcPort = callOp->
port(1);
344 if (pcPort != NULL && pcPort->
width() != addrWidth) {
346 "Program counter port has different width than instruction "
366 for (
int i = 0; i < fuNav.
count(); i++) {
371 string errorMsg =
"The machine has an FU with missing ports.";
static void checkOperandBindings(const TTAMachine::FunctionUnit &fu, MachineValidatorResults &results)
void checkGCUHasAddressSpace(MachineValidatorResults &results) const
@ IMEM_ADDR_WIDTH_DIFFERS_FROM_RA_AND_PC
Instruction memory address width differs from PC/RA port width.
TTAMachine::Machine * machine
the architecture definition of the estimated processor
@ GCU_MISSING
GCU missing in machine.
const TTAMachine::Machine & machine_
The machine to validate.
@ USED_IO_NOT_BOUND
Pipeline uses an IO which is not bound.
virtual AddressSpace * addressSpace() const
MachineValidator(const TTAMachine::Machine &machine)
@ PC_PORT_MISSING
PC port missing in GCU.
void checkIMemAddrWidth(MachineValidatorResults &results) const
virtual int socketCount() const
#define assert(condition)
virtual FUPort * port(int operand) const
@ FU_PORT_MISSING
FU is missing ports.
virtual ControlUnit * controlUnit() const
@ GCU_AS_MISSING
Address space missing in GCU.
@ PC_AND_RA_PORTS_HAVE_UNEQUAL_WIDTH
RA and PC ports have unequal width.
void checkRAPortHasSameWidthAsPCPort(MachineValidatorResults &results) const
@ DIFFERENT_PORT_FOR_JUMP_AND_CALL
JUMP and CALL uses different port in GCU.
virtual FunctionUnitNavigator functionUnitNavigator() const
void addError(MachineValidator::ErrorCode code, const std::string &errorMsg)
ErrorCode
Error codes for different errors.
void checkReturnAddressPort(MachineValidatorResults &results) const
virtual bool hasOperation(const std::string &name) const
void checkGCUExists(MachineValidatorResults &results) const
virtual int operationPortCount() const
@ RA_PORT_MISSING
RA port missing in GCU.
MachineValidatorResults * validate(const std::set< ErrorCode > &errorsToCheck) const
void checkProgramCounterPort(MachineValidatorResults &results) const
ComponentType * item(int index) const
virtual HWOperation * operation(const std::string &name) const
virtual ~MachineValidator()
virtual FUPort * operationPort(const std::string &name) const
SpecialRegisterPort * returnAddressPort() const
void checkJumpAndCallOperandBindings(MachineValidatorResults &results) const
virtual ULongWord end() const
bool hasReturnAddressPort() const
virtual int width() const
void checkOperandBindings(MachineValidatorResults &results) const
void checkFUConnections(MachineValidatorResults &results) const