OutputFUBroker.hh

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/*
    Copyright (c) 2002-2009 Tampere University.
 
    This file is part of TTA-Based Codesign Environment (TCE).
 
    Permission is hereby granted, free of charge, to any person obtaining a
    copy of this software and associated documentation files (the "Software"),
    to deal in the Software without restriction, including without limitation
    the rights to use, copy, modify, merge, publish, distribute, sublicense,
    and/or sell copies of the Software, and to permit persons to whom the
    Software is furnished to do so, subject to the following conditions:
 
    The above copyright notice and this permission notice shall be included in
    all copies or substantial portions of the Software.
 
    THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
    IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
    FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
    THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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 */
/**
 * @file OutputFUBroker.hh
 *
 * Declaration of OutputFUBroker class.
 *
 * @author Ari Mets�halme 2006 (ari.metsahalme-no.spam-tut.fi)
 * @note rating: red
 */
 
#ifndef TTA_OUTPUT_FU_BROKER_HH
#define TTA_OUTPUT_FU_BROKER_HH
 
#include "FUBroker.hh"
 
namespace TTAMachine {
    class Machine;
    class MachinePart;
}
 
class MoveNode;
class ResourceMapper;
class SchedulingResource;
 
/**
 * Output function unit broker.
 */
class OutputFUBroker : public FUBroker {
public:
    OutputFUBroker(std::string, unsigned int initiationInterval = 0);
    virtual ~OutputFUBroker();
 
    virtual SchedulingResourceSet allAvailableResources(
        int cycle, const MoveNode& node, const TTAMachine::Bus* bus,
        const TTAMachine::FunctionUnit* srcFU,
        const TTAMachine::FunctionUnit* dstFU,
        int immWriteCycle,
        const TTAMachine::ImmediateUnit* immu,
        int immRegIndex) const override;
  virtual void assign(int cycle, MoveNode& node, SchedulingResource& res,
              int immWriteCycle, int immRegIndex) override;
 
    virtual void unassign(MoveNode& node) override;
 
    virtual int earliestCycle(int cycle, const MoveNode& node,
                              const TTAMachine::Bus* bus,
                              const TTAMachine::FunctionUnit* srcFU,
                              const TTAMachine::FunctionUnit* dstFU,
                              int immWriteCycle,
                              const TTAMachine::ImmediateUnit* immu,
                              int immRegIndex) const override;
    virtual int latestCycle(int cycle, const MoveNode& node,
                            const TTAMachine::Bus* bus,
                            const TTAMachine::FunctionUnit* srcFU,
                            const TTAMachine::FunctionUnit* dstFU,
                            int immWriteCycle,
                            const TTAMachine::ImmediateUnit* immu,
                            int immRegIndex) const override;
    virtual bool isAlreadyAssigned(
        int cycle, const MoveNode& node,
        const TTAMachine::Bus* preassignedBus) const override;
    virtual bool isApplicable(
        const MoveNode& node, const TTAMachine::Bus* b = 0) const override;
    virtual void buildResources(const TTAMachine::Machine& target) override;
    virtual void setupResourceLinks(const ResourceMapper& mapper) override;
};
 
#endif