OpenASIP 2.2
Loading...
Searching...
No Matches
TCERegisterInfo.hh
Go to the documentation of this file.
1/*
2 Copyright (c) 2002-2009 Tampere University.
3
4 This file is part of TTA-Based Codesign Environment (TCE).
5
6 Permission is hereby granted, free of charge, to any person obtaining a
7 copy of this software and associated documentation files (the "Software"),
8 to deal in the Software without restriction, including without limitation
9 the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 and/or sell copies of the Software, and to permit persons to whom the
11 Software is furnished to do so, subject to the following conditions:
12
13 The above copyright notice and this permission notice shall be included in
14 all copies or substantial portions of the Software.
15
16 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 DEALINGS IN THE SOFTWARE.
23 */
24/**
25 * @file TCERegisterInfo.h
26 *
27 * Declaration of TCERegisterInfo class.
28 *
29 * @author Veli-Pekka Jääskeläinen 2007 (vjaaskel-no.spam-cs.tut.fi)
30 * @author Heikki Kultala 2011 (heikki.kultala-no.spam-tut.fi)
31 */
32
33#ifndef TCE_REGISTER_INFO_H
34#define TCE_REGISTER_INFO_H
35
36#include <llvm/ADT/BitVector.h>
37
38#include "TCESubtarget.hh"
39
40#define GET_REGINFO_HEADER
41#include "TCEGenRegisterInfo.inc"
42
43#include "tce_config.h"
44
45namespace llvm {
46 class TargetInstrInfo;
47 class Type;
48 class TCEFrameLowering;
49
50 /**
51 * Class which handles registers in the TCE backend.
52 */
53 class TCERegisterInfo : public TCEGenRegisterInfo {
54 public:
55 TCERegisterInfo(const TargetInstrInfo& tii);
56 virtual ~TCERegisterInfo() {};
57
59 MachineFunction &MF,
60 MachineBasicBlock &MBB,
61 MachineBasicBlock::iterator I) const;
62
63 const MCPhysReg* getCalleeSavedRegs(const MachineFunction *MF = 0) const override;
64
65 BitVector getReservedRegs(const MachineFunction &MF) const override;
66
67 #ifdef LLVM_OLDER_THAN_16
68 void eliminateFrameIndex(MachineBasicBlock::iterator II,
69 #else
70 bool eliminateFrameIndex(MachineBasicBlock::iterator II,
71 #endif
72 int SPAdj, unsigned FIOperandNum,
73 RegScavenger *RS = NULL) const override;
74
75 unsigned getRARegister() const;
76
77 Register getFrameRegister(const MachineFunction& mf) const override;
78
79 bool requiresRegisterScavenging(const MachineFunction&) const override;
80
81 int getDwarfRegNum(unsigned regNum, bool isEH) const;
82 int getLLVMRegNum(unsigned int, bool) const;
83 bool hasFP(const MachineFunction &MF) const;
84 void setTFI(const TCEFrameLowering* tfi) { tfi_ = tfi; };
85 private:
86 void setReservedVectorRegs(llvm::BitVector& reserved) const;
87
88 const TargetInstrInfo& tii_;
90 };
91}
92
93
94#endif
int getLLVMRegNum(unsigned int, bool) const
const MCPhysReg * getCalleeSavedRegs(const MachineFunction *MF=0) const override
BitVector getReservedRegs(const MachineFunction &MF) const override
const TCEFrameLowering * tfi_
void setTFI(const TCEFrameLowering *tfi)
void setReservedVectorRegs(llvm::BitVector &reserved) const
void eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const
bool hasFP(const MachineFunction &MF) const
int getDwarfRegNum(unsigned regNum, bool isEH) const
Register getFrameRegister(const MachineFunction &mf) const override
unsigned getRARegister() const
bool requiresRegisterScavenging(const MachineFunction &) const override
bool eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, unsigned FIOperandNum, RegScavenger *RS=NULL) const override
const TargetInstrInfo & tii_