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33 #ifndef TCE_TARGET_MACHINE_H
34 #define TCE_TARGET_MACHINE_H
38 #include "tce_config.h"
43 #include "llvm/CodeGen/TargetLowering.h"
44 #include "llvm/CodeGen/TargetFrameLowering.h"
45 #include "llvm/Analysis/TargetTransformInfo.h"
46 #include "llvm/Target/TargetMachine.h"
47 #include "llvm/CodeGen/SelectionDAGTargetInfo.h"
49 #include "llvm/IR/PassManager.h"
61 #include "llvm/CodeGen/Passes.h"
62 #include "llvm/IR/DataLayout.h"
64 #include "llvm/CodeGen/TargetPassConfig.h"
72 class PipelineableLoopFinder;
84 LLVMTargetMachine* tm,
87 TargetPassConfig(*tm, pm),
110 const Target &T,
const Triple& TTriple,
111 const llvm::StringRef& CPU,
const llvm::StringRef& FS,
113 Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
114 CodeGenOpt::Level OL,
bool isLittle);
174 PassManagerBase &PM)
override;
176 #ifdef LLVM_OLDER_THAN_15
204 std::string
rfName(
unsigned dwarfRegNum)
const {
217 return rfName(dwarfRegNum) +
"."
279 std::cerr <<
"ZERO STACK ALIGN\n";
325 int getLoadOpcode(
int asid,
int align,
const llvm::EVT& vt)
const;
333 std::set<std::pair<unsigned, llvm::MVT::SimpleValueType> >
missingOps_;
334 std::set<std::pair<unsigned, llvm::MVT::SimpleValueType> >
promotedOps_;
virtual unsigned registerIndex(unsigned dwarfRegNum)=0
Returns name of the physical register index corresponding to a generated register ID.
int getMinuOpcode(llvm::SDNode *n)
std::string rfName(unsigned dwarfRegNum) const
bool canEncodeAsMOVF(const llvm::APFloat &fp) const
virtual int getMaxuOpcode(llvm::SDNode *n) const =0
void LLVMInitializeTCETarget()
const std::set< std::pair< unsigned, llvm::MVT::SimpleValueType > > * customLegalizedOperations()
unsigned llvmRegisterId(const TCEString &ttaRegister)
int getShlOpcode(const llvm::EVT &vt) const
int getMaxOpcode(llvm::SDNode *n)
virtual const TargetInstrInfo * getInstrInfo() const
virtual bool addInstSelector()
TCETargetMachinePlugin * plugin_
virtual int getMinuOpcode(llvm::SDNode *n) const =0
virtual bool has8bitLoads() const =0
bool canMaterializeConstant(const ConstantInt &ci) const
virtual bool has16bitLoads() const =0
virtual const TargetFrameLowering * getFrameLowering() const =0
bool validStackAccessOperation(const std::string &opName) const
virtual int getMinOpcode(llvm::SDNode *n) const =0
Module * emulationModule_
virtual bool validStackAccessOperation(const std::string &opName) const =0
Returns true if OSAL operation is valid for stack accesses.
virtual int getIorOpcode(const llvm::EVT &vt) const =0
virtual void setTTAMach(const TTAMachine::Machine *mach)
virtual int getMaxOpcode(llvm::SDNode *n) const =0
unsigned spDRegNum() const
virtual TargetTransformInfo getTargetTransformInfo(const Function &F) const =0
virtual const DataLayout * getDataLayout() const
virtual const TargetRegisterInfo * getRegisterInfo() const
virtual const TargetSubtargetInfo * getSubtarget() const =0
unsigned raPortDRegNum() const
virtual void setTargetMachinePlugin(TCETargetMachinePlugin &plugin, TTAMachine::Machine &target)
virtual const TargetInstrInfo * getInstrInfo() const =0
int getMaxuOpcode(llvm::SDNode *n)
bool has8bitLoads() const
virtual TargetLowering * getTargetLowering() const =0
void setStackAlignment(unsigned align)
bool hasOperation(TCEString operationName) const
virtual void setTTAMach(const TTAMachine::Machine *mach) override
#define assert(condition)
std::set< std::pair< unsigned, llvm::MVT::SimpleValueType > > customLegalizedOps_
virtual unsigned spDRegNum()=0
Returns ID number of the stack pointer register.
virtual unsigned raPortDRegNum()=0
Returns ID number of the return address register.
TCETargetMachine(const Target &T, const Triple &TTriple, const llvm::StringRef &CPU, const llvm::StringRef &FS, const TargetOptions &Options, Optional< Reloc::Model > RM, Optional< CodeModel::Model > CM, CodeGenOpt::Level OL, bool isLittle)
virtual bool is64bit() const =0
std::string registerName(unsigned dwarfRegNum) const
virtual const TargetSubtargetInfo * getSubtargetImpl(const Function &) const override
virtual unsigned opcode(TCEString operationName) const =0
Returns the opcode for the given osal operation, undefined if not found.
const std::set< std::pair< unsigned, llvm::MVT::SimpleValueType > > * missingOperations()
int getLoadOpcode(int asid, int align, const llvm::EVT &vt) const
PluginTools * pluginTool_
TCETargetMachinePlugin * plugin_
std::set< std::pair< unsigned, llvm::MVT::SimpleValueType > > missingOps_
llvm::ISD opcode list of operations that have to be expanded.
virtual int getAddOpcode(const llvm::EVT &vt) const =0
virtual TargetPassConfig * createPassConfig(PassManagerBase &PM) override
virtual ~TCETargetMachine()
TCEPassConfig(LLVMTargetMachine *tm, PassManagerBase &pm, TCETargetMachinePlugin *plugin)
virtual const TCESubtarget * getSubtargetImpl() const
virtual std::string rfName(unsigned dwarfRegNum)=0
Returns name of the physical register file corresponding to a generated register ID.
virtual bool hasOperation(TCEString operationName) const =0
Returns true in case the target supports the given osal operation.
virtual void addPreRegAlloc()
virtual bool addPreISel()
virtual TargetLowering * getTargetLowering() const
virtual const DataLayout * getDataLayout() const
#define IGNORE_COMPILER_WARNING(X)
void calculateSupportedImmediates()
std::set< std::pair< unsigned, llvm::MVT::SimpleValueType > > promotedOps_
virtual bool canMaterializeConstant(const ConstantInt &ci) const =0
bool canEncodeAsMOVI(const llvm::MVT &vt, int64_t val) const
virtual int getShlOpcode(const llvm::EVT &vt) const =0
const TTAMachine::Machine * ttaMach_
unsigned registerIndex(unsigned dwarfRegNum) const
TTAMachine::Machine * createMachine()
int getAddOpcode(const llvm::EVT &vt) const
#define POP_COMPILER_DIAGS
virtual const TTAMachine::Machine & ttaMachine() const
virtual void addPreSched2()
unsigned stackAlignment() const
int64_t smallestImmValue() const
unsigned opcode(TCEString operationName) const
const std::set< std::pair< unsigned, llvm::MVT::SimpleValueType > > * promotedOperations()
std::string operationName(unsigned opc) const
virtual std::string operationName(unsigned opc) const =0
Returns operation name corresponding to llvm target opcode.
virtual void setEmulationModule(Module *mod)
bool has16bitLoads() const
int getMinOpcode(llvm::SDNode *n)
int getIorOpcode(const llvm::EVT &vt) const
TargetTransformInfo getTargetTransformInfo(const Function &F) const override
virtual std::string dataASName()=0
Returns name of the data address space.
virtual const TargetRegisterInfo * getRegisterInfo() const =0
uint64_t largestImmValue() const
virtual TCETargetMachinePlugin & targetPlugin() const
virtual const TargetFrameLowering * getFrameLowering() const
virtual unsigned llvmRegisterId(const TCEString &ttaRegister)=0