OpenASIP  2.0
AlteraIntegrator Member List

This is the complete list of members for AlteraIntegrator, including all inherited members.

addProGeFiles() constPlatformIntegratorprotected
AlteraIntegrator()AlteraIntegrator
AlteraIntegrator(const TTAMachine::Machine *machine, const IDF::MachineImplementation *idf, ProGe::HDL hdl, TCEString progeOutputDir, TCEString entityName, TCEString outputDir, TCEString programName, int targetClockFreq, std::ostream &warningStream, std::ostream &errorStream, const MemInfo &imem, MemType dmemType)AlteraIntegrator
chopSignalToTag(const TCEString &original, const TCEString &tag) constPlatformIntegratorprotected
chopTaggedSignals() const =0PlatformIntegratorprotectedpure virtual
clearDataMemories()PlatformIntegratorprotected
clkPort_PlatformIntegratorprivate
clockPort() constPlatformIntegrator
connectToplevelPort(const ProGe::NetlistPort &corePort, const TCEString signalPrefix="")PlatformIntegratorprotectedvirtual
copyProgeBlockToNetlist(const ProGe::NetlistBlock *progeBlock)PlatformIntegratorprotected
coreEntityName() constPlatformIntegrator
coreEntityName_PlatformIntegratorprivate
createMemories(int coreId)PlatformIntegratorprotectedvirtual
createOutputDir()PlatformIntegratorprivate
deviceFamily() const =0PlatformIntegratorpure virtual
deviceName() constPlatformIntegratorinline
deviceName_PlatformIntegratorprivate
devicePackage() const =0PlatformIntegratorpure virtual
deviceSpeedClass() const =0PlatformIntegratorpure virtual
dmem_PlatformIntegratorprivate
dmemCount() constPlatformIntegrator
dmemGen_AlteraIntegratorprivate
dmemInfo(TTAMachine::AddressSpace *as) constPlatformIntegrator
dmemInfo(int index) constPlatformIntegrator
dmemInstance(MemInfo dmem, TTAMachine::FunctionUnit &lsuArch, std::vector< std::string > lsuPorts)AlteraIntegratorprotectedvirtual
dmemType_PlatformIntegratorprivate
errorStream() constPlatformIntegratorprotected
errorStream_PlatformIntegratorprivate
exportUnconnectedPorts(int coreId)PlatformIntegratorprotectedvirtual
generateMemory(MemoryGenerator &memGen, std::vector< TCEString > &generatedFiles, int memIndex, int coreId)PlatformIntegratorprotectedvirtual
hasPinTag(const TCEString &signal) constPlatformIntegratorprotectedvirtual
hdl_PlatformIntegratorprivate
idf() constPlatformIntegrator
idf_PlatformIntegratorprivate
imem_PlatformIntegratorprivate
imemGen_AlteraIntegratorprivate
imemInfo() constPlatformIntegrator
imemInstance(MemInfo imem, int coreId)AlteraIntegratorprotectedvirtual
initPlatformNetlist(const ProGe::NetlistBlock *progeBlock)PlatformIntegratorprotectedvirtual
integrateCore(const ProGe::NetlistBlock &cores, int coreId)PlatformIntegratorprotectedvirtual
integrateProcessor(const ProGe::NetlistBlock *progeBlock)AlteraIntegratorvirtual
integratorBlock()PlatformIntegratorprotected
integratorBlock_PlatformIntegratorprivate
loadFUExternalPorts(TTAMachine::FunctionUnit &fu) constPlatformIntegratorprivate
lsus_PlatformIntegratorprivate
machine() constPlatformIntegrator
machine_PlatformIntegratorprivate
outputDir_PlatformIntegratorprivate
outputFilePath(TCEString fileName, bool absolute=false) constPlatformIntegrator
outputPath() constPlatformIntegrator
parseDataMemories()PlatformIntegratorprotected
pinTag() const =0PlatformIntegratorprotectedpure virtual
platformEntityName() constPlatformIntegratorprotected
PlatformIntegrator()PlatformIntegrator
PlatformIntegrator(const TTAMachine::Machine *machine, const IDF::MachineImplementation *idf, ProGe::HDL hdl, TCEString progeOutputDir, TCEString coreEntityName, TCEString outputDir, TCEString programName, int targetClockFreq, std::ostream &warningStream, std::ostream &errorStream, const MemInfo &imem, MemType dmemType)PlatformIntegrator
printInfo(std::ostream &stream) const =0PlatformIntegratorpure virtual
progeBlock() constPlatformIntegrator
progeFilePath(TCEString fileName, bool absolute=false) constPlatformIntegratorprotected
progeOutputDir_PlatformIntegratorprivate
progeOutputHdlFiles(std::vector< TCEString > &files) constPlatformIntegratorprotected
programName() constPlatformIntegratorprotected
programName_PlatformIntegratorprivate
projectFileGenerator() const =0PlatformIntegratorprotectedpure virtual
readLsuParameters(const TTAMachine::FunctionUnit &lsu)PlatformIntegratorprotected
resetPort() constPlatformIntegrator
resetPort_PlatformIntegratorprivate
setDeviceFamily(TCEString devFamily)=0PlatformIntegratorpure virtual
setDeviceName(TCEString devName)PlatformIntegratorinline
setSharedOutputDir(const TCEString &sharedDir)PlatformIntegrator
sharedOutputDir_PlatformIntegratorprivate
targetClockFrequency() constPlatformIntegratorvirtual
targetFrequency_PlatformIntegratorprivate
toplevelBlock() constPlatformIntegrator
TTA_CORE_CLKPlatformIntegratorprotectedstatic
TTA_CORE_RSTXPlatformIntegratorprotectedstatic
ttaCores_PlatformIntegratorprivate
unconnectedPorts_PlatformIntegratorprivate
warningStream() constPlatformIntegratorprotected
warningStream_PlatformIntegratorprivate
writeNewToplevel()PlatformIntegratorprotectedvirtual
~AlteraIntegrator()AlteraIntegratorvirtual
~PlatformIntegrator()PlatformIntegratorvirtual