#include <AlteraIntegrator.hh>

Inheritance diagram for AlteraIntegrator:

Collaboration diagram for AlteraIntegrator:

Public Member Functions
	AlteraIntegrator ()

	AlteraIntegrator (const TTAMachine::Machine machine, const IDF::MachineImplementation idf, ProGe::HDL hdl, TCEString progeOutputDir, TCEString entityName, TCEString outputDir, TCEString programName, int targetClockFreq, std::ostream &warningStream, std::ostream &errorStream, const MemInfo &imem, MemType dmemType)

virtual	~AlteraIntegrator ()

virtual void	integrateProcessor (const ProGe::NetlistBlock *progeBlock)

Public Member Functions inherited from PlatformIntegrator
	PlatformIntegrator ()

	PlatformIntegrator (const TTAMachine::Machine machine, const IDF::MachineImplementation idf, ProGe::HDL hdl, TCEString progeOutputDir, TCEString coreEntityName, TCEString outputDir, TCEString programName, int targetClockFreq, std::ostream &warningStream, std::ostream &errorStream, const MemInfo &imem, MemType dmemType)

virtual	~PlatformIntegrator ()

virtual TCEString	deviceFamily () const =0

virtual void	setDeviceFamily (TCEString devFamily)=0

void	setDeviceName (TCEString devName)

TCEString	deviceName () const

virtual TCEString	devicePackage () const =0

virtual TCEString	deviceSpeedClass () const =0

virtual int	targetClockFrequency () const

virtual void	printInfo (std::ostream &stream) const =0

const ProGe::NetlistBlock &	progeBlock () const

const ProGe::NetlistBlock &	toplevelBlock () const

void	setSharedOutputDir (const TCEString &sharedDir)

TCEString	outputPath () const

TCEString	outputFilePath (TCEString fileName, bool absolute=false) const

TCEString	coreEntityName () const

const TTAMachine::Machine *	machine () const

const IDF::MachineImplementation *	idf () const

const MemInfo &	imemInfo () const

const MemInfo &	dmemInfo (TTAMachine::AddressSpace *as) const

const MemInfo &	dmemInfo (int index) const

int	dmemCount () const

ProGe::NetlistPort *	clockPort () const

ProGe::NetlistPort *	resetPort () const

Protected Member Functions
virtual MemoryGenerator &	imemInstance (MemInfo imem, int coreId)

virtual MemoryGenerator &	dmemInstance (MemInfo dmem, TTAMachine::FunctionUnit &lsuArch, std::vector< std::string > lsuPorts)

Protected Member Functions inherited from PlatformIntegrator
ProGe::NetlistBlock *	integratorBlock ()

virtual void	initPlatformNetlist (const ProGe::NetlistBlock *progeBlock)

virtual bool	integrateCore (const ProGe::NetlistBlock &cores, int coreId)

virtual void	exportUnconnectedPorts (int coreId)

virtual void	connectToplevelPort (const ProGe::NetlistPort &corePort, const TCEString signalPrefix="")

virtual TCEString	pinTag () const =0

virtual bool	chopTaggedSignals () const =0

virtual bool	hasPinTag (const TCEString &signal) const

void	copyProgeBlockToNetlist (const ProGe::NetlistBlock *progeBlock)

virtual bool	createMemories (int coreId)

virtual bool	generateMemory (MemoryGenerator &memGen, std::vector< TCEString > &generatedFiles, int memIndex, int coreId)

virtual void	writeNewToplevel ()

virtual ProjectFileGenerator *	projectFileGenerator () const =0

void	addProGeFiles () const

TCEString	programName () const

TCEString	progeFilePath (TCEString fileName, bool absolute=false) const

TCEString	chopSignalToTag (const TCEString &original, const TCEString &tag) const

void	progeOutputHdlFiles (std::vector< TCEString > &files) const

std::ostream &	warningStream () const

std::ostream &	errorStream () const

TCEString	platformEntityName () const

void	parseDataMemories ()

void	clearDataMemories ()

MemInfo	readLsuParameters (const TTAMachine::FunctionUnit &lsu)

Private Attributes
MemoryGenerator *	imemGen_

std::map< TCEString, MemoryGenerator * >	dmemGen_

Additional Inherited Members
Static Protected Attributes inherited from PlatformIntegrator
static const TCEString	TTA_CORE_CLK = "clk"

static const TCEString	TTA_CORE_RSTX = "rstx"

Detailed Description

Definition at line 39 of file AlteraIntegrator.hh.

Constructor & Destructor Documentation

◆ AlteraIntegrator() [1/2]

AlteraIntegrator::AlteraIntegrator ( )

Definition at line 44 of file AlteraIntegrator.cc.

44 : PlatformIntegrator() {

45 }

◆ AlteraIntegrator() [2/2]

AlteraIntegrator::AlteraIntegrator	(	const TTAMachine::Machine *	machine,
		const IDF::MachineImplementation *	idf,
		ProGe::HDL	hdl,
		TCEString	progeOutputDir,
		TCEString	entityName,
		TCEString	outputDir,
		TCEString	programName,
		int	targetClockFreq,
		std::ostream &	warningStream,
		std::ostream &	errorStream,
		const MemInfo &	imem,
		MemType	dmemType
	)

Definition at line 48 of file AlteraIntegrator.cc.

                      :
     PlatformIntegrator(machine, idf, hdl, progeOutputDir, coreEntityName,
                        outputDir, programName, targetClockFreq, warningStream,
                        errorStream, imem, dmemType),
     imemGen_(NULL), dmemGen_() {
 }

◆ ~AlteraIntegrator()

AlteraIntegrator::~AlteraIntegrator ( )

virtual

Definition at line 68 of file AlteraIntegrator.cc.

                                     {
  
     if (imemGen_ != NULL) {
         delete imemGen_;
     }
     if (!dmemGen_.empty()) {
         std::map<TCEString, MemoryGenerator*>::iterator iter =
             dmemGen_.begin();
         while (iter != dmemGen_.end()) {
             delete iter->second;
             iter++;
         }
     }
 }

References dmemGen_, and imemGen_.

Member Function Documentation

◆ dmemInstance()

MemoryGenerator & AlteraIntegrator::dmemInstance	(	MemInfo	dmem,
		TTAMachine::FunctionUnit &	lsuArch,
		std::vector< std::string >	lsuPorts
	)

protectedvirtual

Implements PlatformIntegrator.

Reimplemented in Stratix2DSPBoardIntegrator, and KoskiIntegrator.

Definition at line 134 of file AlteraIntegrator.cc.

                                    {
     MemoryGenerator* memGen = NULL;
     if (dmemGen_.find(dmem.asName) != dmemGen_.end()) {
         memGen = dmemGen_.find(dmem.asName)->second;
     } else {
         if (dmem.type == ONCHIP) {
             TCEString initFile = programName() + "_" + dmem.asName + ".mif";
             // onchip mem size is scalable, use value from adf's Address Space
             int addrw = dmem.portAddrw;
             memGen =
                 new AlteraOnchipRamGenerator(
                     dmem.mauWidth, dmem.widthInMaus, addrw, initFile,
                     this, warningStream(), errorStream());
             projectFileGenerator()->addMemInitFile(initFile); 
         } else {
             TCEString msg = "Unsupported data memory type";
             throw InvalidData(__FILE__, __LINE__, "AlteraIntegrator", msg);
         }
         memGen->addLsu(lsuArch, lsuPorts);
         dmemGen_[dmem.asName] = memGen;
     }
     return *memGen;
 }

References MemoryGenerator::addLsu(), ProjectFileGenerator::addMemInitFile(), MemInfo::asName, dmemGen_, PlatformIntegrator::errorStream(), MemInfo::mauWidth, ONCHIP, MemInfo::portAddrw, PlatformIntegrator::programName(), PlatformIntegrator::projectFileGenerator(), MemInfo::type, PlatformIntegrator::warningStream(), and MemInfo::widthInMaus.

Referenced by Stratix2DSPBoardIntegrator::dmemInstance().

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◆ imemInstance()

MemoryGenerator & AlteraIntegrator::imemInstance	(	MemInfo	imem,
		int	coreId
	)

protectedvirtual

Implements PlatformIntegrator.

Definition at line 104 of file AlteraIntegrator.cc.

                                                        {
     assert(imem.type != UNKNOWN && "Imem type not set!");
  
     TCEString initFile;
     if (imem.type == ONCHIP) {
         initFile = programName() + ".mif";
         projectFileGenerator()->addMemInitFile(initFile);
     } else if (imem.type == VHDL_ARRAY) {
         initFile = programName() + "_imem_pkg.vhdl";
     }
  
     if (imemGen_ == NULL) {
         if (imem.type == ONCHIP) {
             imemGen_ = 
                 new AlteraOnchipRomGenerator(
                     imem.mauWidth, imem.widthInMaus, imem.portAddrw, initFile,
                     this, warningStream(), errorStream());
         } else if (imem.type == VHDL_ARRAY) {
             imemGen_ = new VhdlRomGenerator(
                 imem.mauWidth, imem.widthInMaus, imem.portAddrw, initFile,
                 this, warningStream(), errorStream());
         } else {
             TCEString msg = "Unsupported instruction memory type";
             throw InvalidData(__FILE__, __LINE__, "AlteraIntegrator", msg);
         }
     }
     return *imemGen_;
 }

References ProjectFileGenerator::addMemInitFile(), assert, PlatformIntegrator::errorStream(), imemGen_, MemInfo::mauWidth, ONCHIP, MemInfo::portAddrw, PlatformIntegrator::programName(), PlatformIntegrator::projectFileGenerator(), MemInfo::type, UNKNOWN, VHDL_ARRAY, PlatformIntegrator::warningStream(), and MemInfo::widthInMaus.

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◆ integrateProcessor()

void AlteraIntegrator::integrateProcessor ( const ProGe::NetlistBlock * progeBlock )

virtual

Integrates the TTA core(s) generated by ProGe

Parameters

progeBlock The toplevel netlist block created by ProGe

Implements PlatformIntegrator.

Reimplemented in Stratix2DSPBoardIntegrator, and Stratix3DevKitIntegrator.

Definition at line 85 of file AlteraIntegrator.cc.

                                                      {
  
     initPlatformNetlist(progeBlockInOldNetlist);
  
     const NetlistBlock& core = progeBlock();
     int coreId = -1;
     if (!integrateCore(core, coreId)) {
         return;
     }
  
     writeNewToplevel();
     
     addProGeFiles();
  
     projectFileGenerator()->writeProjectFiles();
 }