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| static void | clearPrologMoves () | 
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| static MoveNode * | getSisterTrigger (const MoveNode &mn, const TTAMachine::Machine &mach) | 
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| DataDependenceGraph & | ddg () | 
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| DataDependenceGraph * | rootDDG () | 
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| const DataDependenceGraph & | ddg () const | 
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| DataDependenceGraph * | prologDDG () | 
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| SimpleResourceManager & | rm () const | 
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| SimpleResourceManager * | prologRM () const | 
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| BUMoveNodeSelector & | selector () | 
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| const TTAMachine::Machine & | targetMachine () const | 
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| unsigned int | ii () const | 
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| MoveNodeDuplicator & | duplicator () const | 
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| virtual bool | assign (int cycle, MoveNode &, const TTAMachine::Bus *bus=nullptr, const TTAMachine::FunctionUnit *srcFU_=nullptr, const TTAMachine::FunctionUnit *dstFU=nullptr, const TTAMachine::Bus *prologBus=nullptr, int immWriteCycle=-1, int prologImmWriteCycle=-1, const TTAMachine::ImmediateUnit *immu=nullptr, int immRegIndex=-1, bool ignoreGuardWriteCycle=false) | 
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| virtual void | unassign (MoveNode &mn, bool disposePrologCopy=true) | 
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| virtual int | rmEC (int cycle, MoveNode &mn, const TTAMachine::Bus *bus=nullptr, const TTAMachine::FunctionUnit *srcFU=nullptr, const TTAMachine::FunctionUnit *dstFU=nullptr, const TTAMachine::Bus *prologBus=nullptr, int immWriteCycle=-1, int prologImmWriteCycle=-1, const TTAMachine::ImmediateUnit *immu=nullptr, int immRegIndex=-1) | 
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| virtual int | rmLC (int cycle, MoveNode &mn, const TTAMachine::Bus *bus=nullptr, const TTAMachine::FunctionUnit *srcFU=nullptr, const TTAMachine::FunctionUnit *dstFU=nullptr, const TTAMachine::Bus *prologBus=nullptr, int immWriteCycle=-1, int prologImmWriteCycle=-1, const TTAMachine::ImmediateUnit *immu=nullptr, int immRegIndex=-1) | 
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| virtual bool | canAssign (int cycle, MoveNode &mn, const TTAMachine::Bus *bus=nullptr, const TTAMachine::FunctionUnit *srcFU=nullptr, const TTAMachine::FunctionUnit *dstFU=nullptr, const TTAMachine::Bus *prologBus=nullptr, int immWriteCycle=-1, int prologImmWriteCycle=-1, const TTAMachine::ImmediateUnit *immu=nullptr, int immRegIndex=-1, bool ignoreGWN=false) | 
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| bool | putAlsoToPrologEpilog (int cycle, MoveNode &mn) | 
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| void | setPrologSrcFUAnno (MoveNode &prologMN, MoveNode &loopMN) | 
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| void | setPrologDstFUAnno (MoveNode &prologMN, MoveNode &loopMN) | 
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| void | setJumpGuard (MoveNode &mn) | 
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| void | unsetJumpGuard (MoveNode &mn) | 
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| bool | needJumpGuard (const MoveNode &mn, int cycle) | 
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| int | jumpGuardAvailableCycle (const MoveNode &mn) | 
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| bool | canBeSpeculated (const Operation &op) | 
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| bool | canBeSpeculated (const MoveNode &mn) | 
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| bool | usePrologMove (const MoveNode &mn) | 
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| bool | canBeScheduled (const MoveNode &mn) | 
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| const TTAMachine::RegisterFile * | RFReadPortCountPreventsScheduling (const MoveNode &mn) | 
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| bool | immCountPreventsScheduling (const MoveNode &mn) | 
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| bool | runPreChild (Reversible *preChild) | 
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| bool | runPostChild (Reversible *preChild) | 
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| bool | runChild (std::stack< Reversible * > &children, Reversible *child) | 
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| bool | runChild (Reversible *child, bool pre) | 
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| void | undoAndRemovePreChildren () | 
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| void | undoAndRemovePostChildren () | 
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| void | undoAndRemoveChildren (std::stack< Reversible * > &children) | 
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| virtual void | undoOnlyMe () | 
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| static std::map< MoveNode *, MoveNode *, MoveNode::Comparator > | prologMoves_ | 
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Definition at line 42 of file BFRenameSource.hh.