OpenASIP
2.0
src
applibs
Simulator
tce_systemc.hh
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/*
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Copyright (c) 2002-2010 Tampere University.
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This file is part of TTA-Based Codesign Environment (TCE).
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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DEALINGS IN THE SOFTWARE.
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*/
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/**
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* @file tce_systemc.hh
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*
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* Wrappers and utilities for connecting TTA core simulation models to
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* SystemC simulations.
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*
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* @author Pekka Jääskeläinen 2010 (pjaaskel-no.spam-cs.tut.fi)
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*/
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#ifndef TCE_SYSTEMC_HH
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#define TCE_SYSTEMC_HH
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#include <stdint.h>
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#include <systemc.h>
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#include <
Operation.hh
>
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#include <
SimpleSimulatorFrontend.hh
>
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#include <
DetailedOperationSimulator.hh
>
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#include <
ExecutingOperation.hh
>
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#include <
SimValue.hh
>
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/**
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* A sc_module wrapper for the whole TTA core simulation model.
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*
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* This model is sentive to clock signal. Propagates the clock signal
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* internally to other clocked datapath models (mainly FU models).
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*/
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class
TTACore
:
public
sc_module,
public
SimpleSimulatorFrontend
{
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public
:
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sc_in<bool>
clock
;
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sc_in<bool>
global_lock
;
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SC_HAS_PROCESS
(
TTACore
);
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TTACore
(
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sc_module_name name, std::string machineFile,
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std::string programFile) :
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sc_module(name),
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SimpleSimulatorFrontend
(machineFile, programFile,
false
, true) {
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SC_METHOD(
step
);
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sensitive <<
clock
.pos();
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lockCycles_
= 0;
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instructionCycles_
= 0;
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}
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// number of cycles the tta has been locked during the simulation
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uint64_t
lockCycles
()
const
{
return
lockCycles_
; }
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// number of instructions executed
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uint64_t
instructionCycles
()
const
{
return
instructionCycles_
; }
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private
:
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void
step
() {
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if
(!
global_lock
) {
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SimpleSimulatorFrontend::step
();
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++
instructionCycles_
;
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}
else
{
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++
lockCycles_
;
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}
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}
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uint64_t
instructionCycles_
;
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uint64_t
lockCycles_
;
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};
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/**
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* Macros used to override FU operation simulation behavior.
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*/
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#define TCE_SC_OPERATION_SIMULATOR(__CLASS__) \
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struct __CLASS__ : public DetailedOperationSimulator, public sc_module
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#define TCE_SC_OPERATION_SIMULATOR_CTOR(__CLASS__) \
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SC_HAS_PROCESS(__CLASS__); \
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__CLASS__(sc_module_name name) : sc_module(name)
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#define TCE_SC_SIMULATE_STAGE \
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bool simulateStage(ExecutingOperation& __eop)
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#define TCE_SC_SIMULATE_CYCLE_START \
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void simulateCycleStart()
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#define TCE_SC_OPNAME \
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(__eop.operation().name())
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#define TCE_SC_OPSTAGE \
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(__eop.stage())
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#define TCE_SC_OPERATION \
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__eop.operation()
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#define TCE_SC_INT(OPERAND) (__eop.io(OPERAND).intValue())
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#define TCE_SC_UINT(OPERAND)(__eop.io(OPERAND).unsignedValue())
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#define TCE_SC_FLT(OPERAND) (__eop.io(OPERAND).floatWordValue())
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#define TCE_SC_DBL(OPERAND) (__eop.io(OPERAND).doubleWordValue())
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#define TCE_SC_OUTPUT(OPERAND) (__eop.io(OPERAND))
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#define TCE_SC_FUPORT_BWIDTH(OPERAND) (__eop.io(OPERAND).width())
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#endif
TTACore::lockCycles_
uint64_t lockCycles_
Definition:
tce_systemc.hh:82
TTACore::step
void step()
Definition:
tce_systemc.hh:73
DetailedOperationSimulator.hh
TTACore::lockCycles
uint64_t lockCycles() const
Definition:
tce_systemc.hh:69
TTACore::instructionCycles_
uint64_t instructionCycles_
Definition:
tce_systemc.hh:81
SimpleSimulatorFrontend.hh
TTACore::clock
sc_in< bool > clock
Definition:
tce_systemc.hh:52
SimpleSimulatorFrontend
Definition:
SimpleSimulatorFrontend.hh:58
Operation.hh
TTACore
Definition:
tce_systemc.hh:50
TTACore::instructionCycles
uint64_t instructionCycles() const
Definition:
tce_systemc.hh:71
TTACore::SC_HAS_PROCESS
SC_HAS_PROCESS(TTACore)
ExecutingOperation.hh
false
find Finds info of the inner loops in the false
Definition:
InnerLoopFinder.cc:81
SimValue.hh
TTACore::global_lock
sc_in< bool > global_lock
Definition:
tce_systemc.hh:53
SimpleSimulatorFrontend::step
void step()
Definition:
SimpleSimulatorFrontend.cc:105
TTACore::TTACore
TTACore(sc_module_name name, std::string machineFile, std::string programFile)
Definition:
tce_systemc.hh:57
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