References

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The Bibliography

For postcript versions of the most of the mentioned below papers click here .

[1] J.M. Mulder, R.J. Portier, A. Srivastava, and R. in 't Velt. An efficient emulation mechanism for hardwired pipelined processors. In Proceedings of the 21nd workshop on microprogramming and microarchitectures, November 1988.

[2] J.M. Mulder et al. A framework for application-specific architecture design. In Proceedings of the 16th International Symphosium on Computer Architecture, May 1989.

[3] J.M. Mulder and R.J. Portier. Cost-effective design of application-specific VLIW processors using the SCARCE framework. In Proceedings of the 22nd workshop on microprogramming and microarchitectures, August 1989.

[4] J.M. Mulder and P. Stravers. A Flexible VLSI Core for an Adaptable Architecture. In Proceedings of the 22nd workshop on micrprogramming and microarchitectures, August 1989.

[5] J.M. Mulder, R. Portier, and A. Srivastava. A framework for high-speed controller design. In Proceedings of the 23th workshop on microprogramming and microarchitectures, November 1990.

[6] J.M. Mulder. Application-Specific Controllers as Regular Structures in a Silicon Compiler. In Proceedings of the Silicon Design Conference, November 1990.

[7] H. Corporaal and J.G.E. Olk. A Scalable Communication Processor Design Supporting Systolic Communication. In EDMCC-2 Conference proceedings, Munchen, April 1991.

[8] H. Corporaal and J.G.E. Olk. Design and Evaluation of Communication Processors supporting Message Passing in Distributed Memory Systems. In DMCC-6 conference proceedings, Portland, April 1991.

[9] H. Corporaal and J.G.E. Olk. A Scalable VLSI MIMD Routing Cell. In DMCC-6 conference proceedings, Portland, April 1991.

[10] Henk Corporaal and Hans (J.M.) Mulder. MOVE: A framework for high-performance processor design. In Supercomputing-91, pages 692-701, Albuquerque, November 1991.

[11] Jan Hoogerbrugge and Henk Corporaal. Comparing software pipelining for an operation-triggered and a transport-triggered architecture. In Lecture Notes in Computer Science 641, Compiler Construction, pages 219-228. Springer-Verlag, 1992.

[12] Henk Corporaal. Evaluating Transport Triggered Architectures for scalar applications. Microprocessing and Microprogramming, 38:45-52, September 1993.

[13] Jan Hoogerbrugge and Henk Corporaal. Transport-triggering vs. operation-triggering. In Compiler Construction conference CC-94, 1994.

[14] Jan Hoogerbrugge, Henk Corporaal, and Hans Mulder. Software pipelining for transport-triggered architectures. In MICRO-24, Albuquerque, November 1991.

[15] Henk Corporaal. Transport triggered architectures examined for general purpose applications. In Sixth Workshop Computer Systems, Delft, pages 55-71, January 1993.

[16] Andy Verberne and Henk Corporaal. Towards efficient code scheduling for transport triggered architectures. In Fourth symposium on Computer Systems, Amsterdam, October 1991. UvA.

[17] Robert Portier. GEPS, global enhanced pipeline scheduling. Technical Report submitted for publication, Delft University of Technology, Electr. Eng. Department, The Netherlands, August 1993.

[18] Henk Corporaal. Move32int, architecture and programmer's reference manual. Technical Report 1-68340-44-(1993)01, Delft University of Technology, Electr. Eng. Department, The Netherlands, 1993.

[19] Henk Corporaal and Paul van der Arend. Move32int, a sea of gates realization of a high performance transport triggered architecture. Microprocessing and Microprogramming, 38:53-60, September 1993.

[20] Eddy Olk and Henk Corporaal. The osi model applied to mimd communication processor design. In PARCO'93, Grenoble, September 1993.

[21] Paul Stravers and Eric Aardoom. A procesor framework customized for navigation computations. INTEGRATION, the VLSI journal, 14(2):197-214, December 1992.

Last modified on March 18^th, 1997 by Irek Karkowski, email I.Karkowski@et.tudelft.nl