OpenASIP 2.2
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MultiLatencyOperationExecutor.hh
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1/*
2 Copyright (c) 2002-2010 Tampere University.
3
4 This file is part of TTA-Based Codesign Environment (TCE).
5
6 Permission is hereby granted, free of charge, to any person obtaining a
7 copy of this software and associated documentation files (the "Software"),
8 to deal in the Software without restriction, including without limitation
9 the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 and/or sell copies of the Software, and to permit persons to whom the
11 Software is furnished to do so, subject to the following conditions:
12
13 The above copyright notice and this permission notice shall be included in
14 all copies or substantial portions of the Software.
15
16 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 DEALINGS IN THE SOFTWARE.
23 */
24/**
25 * @file MultiLatencyOperationExecutor.hh
26 *
27 * Declaration of MultiLatencyOperationExecutor class.
28 *
29 * @author Pekka Jääskeläinen 2008,2010 (pjaaskel-no.spam-cs.tut.fi)
30 * @note rating: red
31 */
32
33#ifndef TTA_MULTILATENCY_OPERATION_EXECUTOR_HH
34#define TTA_MULTILATENCY_OPERATION_EXECUTOR_HH
35
36#include <string>
37#include <list>
38#include <climits>
39
40#include "OperationExecutor.hh"
41#include "ExecutingOperation.hh"
42#include "SimValue.hh"
43
44namespace TTAMachine {
45 class HWOperation;
46}
49
50/**
51 * OperationExecutor that supports multi-output operation pipelines with
52 * different latencies for results.
53 *
54 * Can be also used for cycle-accurate modeling of the operation pipeline.
55 * In addition to simulate the execution of operations with multiple outputs
56 * with different latencies in the standalone TTA simulation, this execution
57 * model is used in the SystemC TTA core function unit simulation model.
58 *
59 * @see tce_systemc.hh
60 */
62public:
67
68 virtual void startOperation(Operation& op);
69
70 virtual void advanceClock();
71 virtual OperationExecutor* copy();
72 virtual void setContext(OperationContext& context);
73 virtual void reset();
76 opSimulator_ = &sim;
77 }
78
79private:
80 /// Assignment not allowed.
83
85
86 /// Operation context.
88 /// The hardware operation this executor simulates.
90 /// The OSAL operation.
92 /// The operations "on flight" in this operation executor.
93 std::vector<ExecutingOperation> executingOps_;
94 /// If non-NULL, points to a known free ExecutingOperation slot.
97 /// If non-NULL, points to a detailed cycle-by-cycle simulation
98 /// model for the operation simulated by this executor.
100};
101
102#endif
ExecutingOperation * freeExecOp_
If non-NULL, points to a known free ExecutingOperation slot.
TTAMachine::HWOperation * hwOperation_
The hardware operation this executor simulates.
Operation * operation_
The OSAL operation.
virtual void setContext(OperationContext &context)
virtual void setOperationSimulator(DetailedOperationSimulator &sim)
DetailedOperationSimulator * opSimulator_
If non-NULL, points to a detailed cycle-by-cycle simulation model for the operation simulated by this...
std::vector< ExecutingOperation > executingOps_
The operations "on flight" in this operation executor.
OperationContext * context_
Operation context.
MultiLatencyOperationExecutor & operator=(const MultiLatencyOperationExecutor &)
Assignment not allowed.
FUState & parent() const