OpenASIP 2.2
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TCEStubTargetTransformInfo.cc
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1/*
2 Copyright (c) 2002-2015 Tampere University.
3
4 This file is part of TTA-Based Codesign Environment (TCE).
5
6 Permission is hereby granted, free of charge, to any person obtaining a
7 copy of this software and associated documentation files (the "Software"),
8 to deal in the Software without restriction, including without limitation
9 the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 and/or sell copies of the Software, and to permit persons to whom the
11 Software is furnished to do so, subject to the following conditions:
12
13 The above copyright notice and this permission notice shall be included in
14 all copies or substantial portions of the Software.
15
16 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 DEALINGS IN THE SOFTWARE.
23*/
24/**
25 * @file TCEStubTargetTransformInfo.cc
26 *
27 * Declaration of TCEStubTargetTransformInfo class.
28 *
29 * @author Ville Korhonen 2015
30 */
31
32#include "CompilerWarnings.hh"
33IGNORE_COMPILER_WARNING("-Wunused-parameter")
34
35#include "tce_config.h"
36
39#include "MachineInfo.hh"
40#include "CIStringSet.hh"
41#include "Machine.hh"
42#include "FunctionUnit.hh"
43#include "Operation.hh"
44#include "Operand.hh"
45#include "OperationPool.hh"
46
47#include <llvm/Analysis/TargetTransformInfo.h>
48#include <llvm/Support/Debug.h>
49#include <llvm/CodeGen/CostTable.h>
50#include <llvm/CodeGen/TargetLowering.h>
51#include <llvm/CodeGen/TargetRegisterInfo.h>
52
53using namespace llvm;
54
55#define DEBUG_TYPE "tcestubtti"
56
57
58unsigned
60 // without adf information we have no clue about registers
61 if (TM->ttaMach_ == NULL)
62 return 0;
63
64 // Widest operand tells directly the widest register
65 unsigned widestOperand =
67
68 return MachineInfo::numberOfRegisters(*(TM->ttaMach_), widestOperand);
69}
70
71unsigned
73const
74{
75 // without adf information we have no clue about registers
76 if (TM->ttaMach_ == NULL)
77 return 0;
78
79 // Widest operand tells directly the widest register
80 return MachineInfo::findWidestOperand(*(TM->ttaMach_), vector);
81}
82
83unsigned
85 // This means maximum loop unroll factor
86 // 2 because loopvectorizer requires >1
87 // TODO: find some way adjust this.
88 return 2;
89}
90
91unsigned
92TCEStubTTIImpl::getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src
93 , const Instruction*
94) {
95 // TODO: Maybe use ADF/osal information to figure out real cost
96 // 1 selected at the moment because LLVM cost model assumed way too high
97 // cost for trunc/zext instructions. Too low value here might lead to
98 // vectorization of loop that would be better left in scalar form
99 return 1;
100}
#define IGNORE_COMPILER_WARNING(X)
static unsigned numberOfRegisters(const TTAMachine::Machine &machine, unsigned width)
static unsigned findWidestOperand(const TTAMachine::Machine &machine, bool vector)
const TTAMachine::Machine * ttaMach_
unsigned getNumberOfRegisters(bool vector)
unsigned getRegisterBitWidth(bool vector) const
unsigned getMaxInterleaveFactor(unsigned VF)
unsigned getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src, const Instruction *=nullptr)
const TCEStubTargetMachine * TM