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67 copyMove->addAnnotation(connMoveAnnotation);
73 #ifdef DEBUG_BUBBLEFISH_SCHEDULER
74 std::cerr <<
"Regcopy creation failing.." << std::endl;
90 #ifdef DEBUG_BUBBLEFISH_SCHEDULER
91 std::cerr <<
"\t\tUndid merge for copy for: " <<
mn_.
toString()
106 bool loopScheduling) {
114 for (
auto i: firstScheduledDefs0) {
115 if (!
ddg().exclusingGuards(*i, useMove)) {
122 if (!
ddg().exclusingGuards(*i, defMove)) {
131 if (loopScheduling) {
135 for (
auto i: lastScheduledReads0) {
136 if (!
ddg().exclusingGuards(*i, defMove)) {
141 false,
false,
false,
false, 1);
148 for (
auto i: lastScheduledDefs0) {
149 if (!
ddg().exclusingGuards(*i, defMove)) {
154 false,
false,
false,
false, 1);
160 if (lastScheduledKill0 == NULL) {
std::shared_ptr< Move > copy() const
void deletingNode(MoveNode *deletedNode)
NodeSet lastScheduledRegisterWrites(const TTAMachine::BaseRegisterFile &rf, int registerIndex) const
void createAntidepsForReg(MoveNode &firstMove, MoveNode &lastMove, const TTAMachine::RegisterFile &rf, int index, TCEString regName, BasicBlockNode &bbn, bool loopScheduling)
std::string toString() const
std::set< MoveNodeUse > MoveNodeUseSet
std::set< MoveNode *, typename MoveNode ::Comparator > NodeSet
bool isUnconditional() const
void setAnnotation(const ProgramAnnotation &annotation)
MoveNodeUseMapSet regDefines_
MoveNode * lastScheduledRegisterKill(const TTAMachine::BaseRegisterFile &rf, int registerIndex) const
TTAProgram::BasicBlock & basicBlock()
#define assert(condition)
LiveRangeData * liveRangeData_
MoveNodeUseMapSet regFirstDefines_
void removeNode(MoveNode &node)
MoveNodeUseMapSet regLastUses_
DataDependenceGraph & ddg()
virtual void undoSplit()=0
void addNode(MoveNode &moveNode)
TTAProgram::Move & move()
@ ANN_STACKFRAME_PROCEDURE_RETURN
precedure return jmp
NodeSet firstScheduledRegisterWrites(const TTAMachine::BaseRegisterFile &rf, int registerIndex) const
@ ANN_CONNECTIVITY_MOVE
A reg to reg move that was added because of missing connectivity between the original target and dest...
virtual bool splitMove(BasicBlockNode &bbn)=0
bool runPostChild(Reversible *preChild)
NodeSet lastScheduledRegisterReads(const TTAMachine::BaseRegisterFile &rf, int registerIndex) const
const BasicBlockNode & getBasicBlockNode(const MoveNode &mn) const
MoveNodeUseMapSet regFirstUses_