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34 #ifndef TTA_GCU_STATE_HH
35 #define TTA_GCU_STATE_HH
52 int instructionAddressIncrement = 1);
UInt32 InstructionAddress
int branchDelayCycles_
The delay of branch operations in the pipeline, as opposed to this unit.
SimValue returnAddressRegister_
The return address register.
int naturalWordWidth_
Natural word width as minimum addressable units.
InstructionAddress & programCounter()
bool operationPending_
If this this is true, there's a control flow operation pending.
OperationContext operationContext_
The operation context for this FU.
SimValue & returnAddressRegister()
InstructionAddress programCounter_
Program counter.
virtual void reset()
this is called at (re)initialization of the simulation
InstructionAddress newProgramCounter_
In case an control flow operation is pending, this variable contains the program counter value that s...
int instructionAddressIncrement_
The increment to instruction address to retrieve next instruction.
virtual void advanceClock()
int operationPendingTime_
This indicates how many cycles the operation has been pending, when this reaches the latency,...
GCUState(int latency, int nww, int cuDelaySlots, int instructionAddressIncrement=1)
virtual OperationContext & context()
int latency_
The delay of the control flow operations to take place.
GCUState & operator=(const GCUState &)
Assignment not allowed.
void setProgramCounter(const InstructionAddress &value)