OpenASIP
2.0
src
applibs
Simulator
LongImmediateUnitState.hh
Go to the documentation of this file.
1
/*
2
Copyright (c) 2002-2009 Tampere University.
3
4
This file is part of TTA-Based Codesign Environment (TCE).
5
6
Permission is hereby granted, free of charge, to any person obtaining a
7
copy of this software and associated documentation files (the "Software"),
8
to deal in the Software without restriction, including without limitation
9
the rights to use, copy, modify, merge, publish, distribute, sublicense,
10
and/or sell copies of the Software, and to permit persons to whom the
11
Software is furnished to do so, subject to the following conditions:
12
13
The above copyright notice and this permission notice shall be included in
14
all copies or substantial portions of the Software.
15
16
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19
THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21
FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22
DEALINGS IN THE SOFTWARE.
23
*/
24
/**
25
* @file LongImmediateUnitState.hh
26
*
27
* Declaration of LongImmediateUnitState class.
28
*
29
* @author Jussi Nykänen 2004 (nykanen-no.spam-cs.tut.fi)
30
* @author Pekka Jääskeläinen 2005 (pjaaskel-no.spam-cs.tut.fi)
31
* @note rating: red
32
*/
33
34
#ifndef TTA_LONG_IMMEDIATE_UNIT_STATE_HH
35
#define TTA_LONG_IMMEDIATE_UNIT_STATE_HH
36
37
#include <vector>
38
#include <queue>
39
#include <map>
40
#include <string>
41
42
#include "
ClockedState.hh
"
43
#include "
Exception.hh
"
44
#include "
SimValue.hh
"
45
46
class
LongImmediateRegisterState
;
47
48
//////////////////////////////////////////////////////////////////////////////
49
// LongImmediateUnitState
50
//////////////////////////////////////////////////////////////////////////////
51
52
/**
53
* Class that represents the states of long immediate units.
54
*/
55
class
LongImmediateUnitState
:
public
ClockedState
{
56
public
:
57
LongImmediateUnitState
(
58
int
size,
59
int
latency,
60
const
std::string& name,
61
int
width,
62
bool
signExtend);
63
virtual
~LongImmediateUnitState
();
64
65
virtual
SimValue
&
registerValue
(
int
index);
66
virtual
void
setRegisterValue
(
int
index,
const
SimValue
& value);
67
68
virtual
LongImmediateRegisterState
&
immediateRegister
(
int
i);
69
virtual
int
immediateRegisterCount
()
const
;
70
71
virtual
void
endClock
();
72
virtual
void
advanceClock
();
73
74
private
:
75
/// Copying not allowed.
76
LongImmediateUnitState
(
const
LongImmediateUnitState
&);
77
/// Assignment not allowed.
78
LongImmediateUnitState
&
operator=
(
const
LongImmediateUnitState
&);
79
80
void
clear
();
81
82
/**
83
* Represents one value update request.
84
*/
85
struct
Item
{
86
/**
87
* Constructor.
88
*/
89
Item
() :
arrival_
(0),
value_
(64),
index_
(0) {}
90
Item
(
SimValue
value,
int
index,
unsigned
arrival)
91
:
arrival_
(arrival),
value_
(value),
index_
(index) {}
92
93
/// Timer of the item.
94
unsigned
arrival_
;
95
/// Value of the item.
96
SimValue
value_
;
97
/// Index of the item.
98
int
index_
;
99
};
100
101
typedef
std::queue<Item>
ItemQueue
;
102
typedef
std::vector<LongImmediateRegisterState*>
RegisterContainer
;
103
typedef
std::vector<SimValue>
ValueContainer
;
104
105
/// Latency of LongImmediateUnit.
106
int
latency_
;
107
/// Name of the unit.
108
std::string
name_
;
109
/// Queue of register value update requests.
110
ItemQueue
queue_
;
111
/// Contains all long immediate registers of the unit.
112
RegisterContainer
registers_
;
113
/// Contains all values of the registers.
114
ValueContainer
values_
;
115
/// Counter to time arrival of immediate values. Note: value is expected
116
/// to wrap.
117
unsigned
timer_
= 0;
118
119
};
120
121
//////////////////////////////////////////////////////////////////////////////
122
// NullLongImmediateUnitState
123
//////////////////////////////////////////////////////////////////////////////
124
125
/**
126
* Models non-existing LongImmediateUnitState.
127
*/
128
class
NullLongImmediateUnitState
:
public
LongImmediateUnitState
{
129
public
:
130
static
NullLongImmediateUnitState
&
instance
();
131
132
virtual
~NullLongImmediateUnitState
();
133
134
virtual
SimValue
&
registerValue
(
int
index);
135
virtual
void
setRegisterValue
(
int
index,
const
SimValue
& value);
136
137
virtual
LongImmediateRegisterState
&
immediateRegister
(
int
i);
138
virtual
int
immediateRegisterCount
()
const
;
139
140
virtual
void
endClock
();
141
virtual
void
advanceClock
();
142
143
private
:
144
NullLongImmediateUnitState
();
145
/// Copying not allowed.
146
NullLongImmediateUnitState
(
const
NullLongImmediateUnitState
&);
147
/// Assignment not allowed.
148
NullLongImmediateUnitState
&
operator=
(
const
NullLongImmediateUnitState
&);
149
150
/// Unique instance of NullLongImmediateUnitState.
151
static
NullLongImmediateUnitState
*
instance_
;
152
};
153
154
#endif
LongImmediateUnitState::LongImmediateUnitState
LongImmediateUnitState(int size, int latency, const std::string &name, int width, bool signExtend)
Definition:
LongImmediateUnitState.cc:58
LongImmediateUnitState::immediateRegister
virtual LongImmediateRegisterState & immediateRegister(int i)
Definition:
LongImmediateUnitState.cc:160
NullLongImmediateUnitState::registerValue
virtual SimValue & registerValue(int index)
Definition:
LongImmediateUnitState.cc:218
NullLongImmediateUnitState::instance
static NullLongImmediateUnitState & instance()
Definition:
LongImmediateUnitState.cc:191
ClockedState
Definition:
ClockedState.hh:40
Exception.hh
LongImmediateUnitState::operator=
LongImmediateUnitState & operator=(const LongImmediateUnitState &)
Assignment not allowed.
LongImmediateUnitState::values_
ValueContainer values_
Contains all values of the registers.
Definition:
LongImmediateUnitState.hh:114
LongImmediateUnitState::immediateRegisterCount
virtual int immediateRegisterCount() const
Definition:
LongImmediateUnitState.cc:174
LongImmediateUnitState::advanceClock
virtual void advanceClock()
Definition:
LongImmediateUnitState.cc:144
LongImmediateUnitState::Item
Definition:
LongImmediateUnitState.hh:85
LongImmediateUnitState::queue_
ItemQueue queue_
Queue of register value update requests.
Definition:
LongImmediateUnitState.hh:110
LongImmediateUnitState::setRegisterValue
virtual void setRegisterValue(int index, const SimValue &value)
Definition:
LongImmediateUnitState.cc:114
LongImmediateUnitState::Item::index_
int index_
Index of the item.
Definition:
LongImmediateUnitState.hh:98
NullLongImmediateUnitState::operator=
NullLongImmediateUnitState & operator=(const NullLongImmediateUnitState &)
Assignment not allowed.
LongImmediateUnitState::Item::value_
SimValue value_
Value of the item.
Definition:
LongImmediateUnitState.hh:96
SimValue
Definition:
SimValue.hh:96
NullLongImmediateUnitState::immediateRegisterCount
virtual int immediateRegisterCount() const
Definition:
LongImmediateUnitState.cc:266
NullLongImmediateUnitState::NullLongImmediateUnitState
NullLongImmediateUnitState()
Definition:
LongImmediateUnitState.cc:201
LongImmediateUnitState::ItemQueue
std::queue< Item > ItemQueue
Definition:
LongImmediateUnitState.hh:101
NullLongImmediateUnitState::endClock
virtual void endClock()
Definition:
LongImmediateUnitState.cc:237
LongImmediateRegisterState
Definition:
LongImmediateRegisterState.hh:47
LongImmediateUnitState::clear
void clear()
Definition:
LongImmediateUnitState.cc:85
LongImmediateUnitState::Item::arrival_
unsigned arrival_
Timer of the item.
Definition:
LongImmediateUnitState.hh:94
NullLongImmediateUnitState
Definition:
LongImmediateUnitState.hh:128
LongImmediateUnitState::Item::Item
Item()
Definition:
LongImmediateUnitState.hh:89
NullLongImmediateUnitState::setRegisterValue
virtual void setRegisterValue(int index, const SimValue &value)
Definition:
LongImmediateUnitState.cc:229
NullLongImmediateUnitState::advanceClock
virtual void advanceClock()
Definition:
LongImmediateUnitState.cc:245
LongImmediateUnitState::Item::Item
Item(SimValue value, int index, unsigned arrival)
Definition:
LongImmediateUnitState.hh:90
LongImmediateUnitState::ValueContainer
std::vector< SimValue > ValueContainer
Definition:
LongImmediateUnitState.hh:103
LongImmediateUnitState::~LongImmediateUnitState
virtual ~LongImmediateUnitState()
Definition:
LongImmediateUnitState.cc:77
LongImmediateUnitState::registers_
RegisterContainer registers_
Contains all long immediate registers of the unit.
Definition:
LongImmediateUnitState.hh:112
NullLongImmediateUnitState::immediateRegister
virtual LongImmediateRegisterState & immediateRegister(int i)
Definition:
LongImmediateUnitState.cc:255
LongImmediateUnitState::name_
std::string name_
Name of the unit.
Definition:
LongImmediateUnitState.hh:108
NullLongImmediateUnitState::~NullLongImmediateUnitState
virtual ~NullLongImmediateUnitState()
Definition:
LongImmediateUnitState.cc:208
NullLongImmediateUnitState::instance_
static NullLongImmediateUnitState * instance_
Unique instance of NullLongImmediateUnitState.
Definition:
LongImmediateUnitState.hh:151
SimValue.hh
LongImmediateUnitState::registerValue
virtual SimValue & registerValue(int index)
Definition:
LongImmediateUnitState.cc:98
ClockedState.hh
LongImmediateUnitState::endClock
virtual void endClock()
Definition:
LongImmediateUnitState.cc:133
LongImmediateUnitState
Definition:
LongImmediateUnitState.hh:55
LongImmediateUnitState::timer_
unsigned timer_
Counter to time arrival of immediate values. Note: value is expected to wrap.
Definition:
LongImmediateUnitState.hh:117
LongImmediateUnitState::RegisterContainer
std::vector< LongImmediateRegisterState * > RegisterContainer
Definition:
LongImmediateUnitState.hh:102
LongImmediateUnitState::latency_
int latency_
Latency of LongImmediateUnit.
Definition:
LongImmediateUnitState.hh:106
Generated by
1.8.17