OpenASIP  2.0
RFTestbenchGenerator.hh
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1 /*
2  Copyright (c) 2002-2010 Tampere University.
3 
4  This file is part of TTA-Based Codesign Environment (TCE).
5 
6  Permission is hereby granted, free of charge, to any person obtaining a
7  copy of this software and associated documentation files (the "Software"),
8  to deal in the Software without restriction, including without limitation
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10  and/or sell copies of the Software, and to permit persons to whom the
11  Software is furnished to do so, subject to the following conditions:
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17  IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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24 /**
25  * @file RFTestbenchGenerator.hh
26  *
27  * Declaration of RFTestbenchGenerator class
28  *
29  * @author Otto Esko 2010 (otto.esko-no.spam-tut.fi)
30  * @note rating: red
31  */
32 
33 #ifndef TTA_RF_TESTBENCH_GENERATOR_HH
34 #define TTA_RF_TESTBENCH_GENERATOR_HH
35 
36 #include <string>
37 #include <fstream>
38 #include <vector>
39 #include "TestbenchGenerator.hh"
40 #include "HDBManager.hh"
41 #include "RFEntry.hh"
42 #include "MemorySystem.hh"
43 
44 class MachineState;
45 
46 namespace TTAMachine {
47  class RegisterFile;
48  class Machine;
49 }
50 
52 public:
54 
55  virtual ~RFTestbenchGenerator();
56 
57  virtual void generateTestbench(std::ofstream& file);
58 
59 private:
60  void createMachineState();
61 
62  void parseRfPorts();
63 
64  void createTbInstantiation();
65 
66  void createStimulus();
67 
68  void createTbCode();
69 
70  void
72  PortDataArray& inputData,
73  PortDataArray& inputOpcode,
74  PortDataArray& inputLoad,
75  PortDataArray& outputData,
76  PortDataArray& outputOpcode,
77  PortDataArray& outputLoad);
78 
79  void
81  std::ostringstream& stream,
82  PortDataArray& array,
83  int portWidth);
84 
85  int opcodePortWidth() const;
86 
91 
95 
96  std::vector<std::string> inputPorts_;
97  std::vector<std::string> inputLoadPorts_;
98  std::vector<std::string> inputOpcodePorts_;
99  std::vector<std::string> outputPorts_;
100  std::vector<std::string> outputLoadPorts_;
101  std::vector<std::string> outputOpcodePorts_;
102 
103  static const std::string RF_NAME_;
104 };
105 
106 #endif
RFTestbenchGenerator::createMachineState
void createMachineState()
Definition: RFTestbenchGenerator.cc:106
RFTestbenchGenerator
Definition: RFTestbenchGenerator.hh:51
RFTestbenchGenerator::outputOpcodePorts_
std::vector< std::string > outputOpcodePorts_
Definition: RFTestbenchGenerator.hh:101
HDB::RFEntry
Definition: RFEntry.hh:47
RFTestbenchGenerator::machine_
TTAMachine::Machine * machine_
Definition: RFTestbenchGenerator.hh:93
RFTestbenchGenerator::inputPorts_
std::vector< std::string > inputPorts_
Definition: RFTestbenchGenerator.hh:96
RFTestbenchGenerator::outputPorts_
std::vector< std::string > outputPorts_
Definition: RFTestbenchGenerator.hh:99
MemorySystem.hh
RFTestbenchGenerator::rfImpl_
HDB::RFImplementation * rfImpl_
Definition: RFTestbenchGenerator.hh:88
RFTestbenchGenerator::outputLoadPorts_
std::vector< std::string > outputLoadPorts_
Definition: RFTestbenchGenerator.hh:100
RFTestbenchGenerator::rfArch_
HDB::RFArchitecture * rfArch_
Definition: RFTestbenchGenerator.hh:89
RFTestbenchGenerator::parseRfPorts
void parseRfPorts()
Definition: RFTestbenchGenerator.cc:142
HDB::RFImplementation
Definition: RFImplementation.hh:50
MachineState
Definition: MachineState.hh:61
RFTestbenchGenerator::RFTestbenchGenerator
RFTestbenchGenerator(HDB::RFEntry *rf)
Definition: RFTestbenchGenerator.cc:64
RFTestbenchGenerator::memSystem_
MemorySystem * memSystem_
Definition: RFTestbenchGenerator.hh:94
RFTestbenchGenerator::createStimulusArrays
void createStimulusArrays(PortDataArray &inputData, PortDataArray &inputOpcode, PortDataArray &inputLoad, PortDataArray &outputData, PortDataArray &outputOpcode, PortDataArray &outputLoad)
Definition: RFTestbenchGenerator.cc:606
RFTestbenchGenerator::RF_NAME_
static const std::string RF_NAME_
Definition: RFTestbenchGenerator.hh:103
TestbenchGenerator.hh
RFTestbenchGenerator::inputOpcodePorts_
std::vector< std::string > inputOpcodePorts_
Definition: RFTestbenchGenerator.hh:98
MemorySystem
Definition: MemorySystem.hh:55
RFTestbenchGenerator::createStimulus
void createStimulus()
Definition: RFTestbenchGenerator.cc:339
RFTestbenchGenerator::machRf_
TTAMachine::RegisterFile * machRf_
Definition: RFTestbenchGenerator.hh:90
HDB::RFArchitecture
Definition: RFArchitecture.hh:50
RFTestbenchGenerator::~RFTestbenchGenerator
virtual ~RFTestbenchGenerator()
Definition: RFTestbenchGenerator.cc:71
RFTestbenchGenerator::generateTestbench
virtual void generateTestbench(std::ofstream &file)
Definition: RFTestbenchGenerator.cc:89
RFTestbenchGenerator::opcodePortWidth
int opcodePortWidth() const
Definition: RFTestbenchGenerator.cc:628
TestbenchGenerator
Definition: TestbenchGenerator.hh:47
RFTestbenchGenerator::writeDataArrays
void writeDataArrays(std::ostringstream &stream, PortDataArray &array, int portWidth)
Definition: RFTestbenchGenerator.cc:648
TestbenchGenerator::PortDataArray
std::map< std::string, std::vector< uint32_t > > PortDataArray
Definition: TestbenchGenerator.hh:56
RFTestbenchGenerator::rfEntry_
HDB::RFEntry * rfEntry_
Definition: RFTestbenchGenerator.hh:87
RFEntry.hh
TTAMachine::RegisterFile
Definition: RegisterFile.hh:47
TTAMachine
Definition: Assembler.hh:48
HDBManager.hh
RFTestbenchGenerator::createTbInstantiation
void createTbInstantiation()
Definition: RFTestbenchGenerator.cc:168
RFTestbenchGenerator::createTbCode
void createTbCode()
Definition: RFTestbenchGenerator.cc:542
RFTestbenchGenerator::inputLoadPorts_
std::vector< std::string > inputLoadPorts_
Definition: RFTestbenchGenerator.hh:97
TTAMachine::Machine
Definition: Machine.hh:73
RFTestbenchGenerator::msm_
MachineState * msm_
Definition: RFTestbenchGenerator.hh:92