OpenASIP  2.0
SimpleResourceManager.cc
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1 /*
2  Copyright (c) 2002-2009 Tampere University.
3 
4  This file is part of TTA-Based Codesign Environment (TCE).
5 
6  Permission is hereby granted, free of charge, to any person obtaining a
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24 /**
25  * @file SimpleResourceManager.cc
26  *
27  * Implementation of SimpleResourceManager class.
28  *
29  * @author Ari Mets�alme 2006 (ari.metsahalme-no.spam-tut.fi)
30  * @author Vladimir Guzma 2007 (vladimir.guzma-no.spam-tut.fi)
31  * @note rating: red
32  */
33 
34 #include "SimpleResourceManager.hh"
35 #include "InputFUBroker.hh"
36 #include "OutputFUBroker.hh"
38 #include "InputPSocketBroker.hh"
39 #include "OutputPSocketBroker.hh"
40 #include "BusBroker.hh"
41 #include "IUBroker.hh"
42 #include "ITemplateBroker.hh"
43 #include "Instruction.hh"
44 #include "SequenceTools.hh"
45 #include "SimpleBrokerDirector.hh"
47 
48 #include <sstream>
49 #include <climits>
50 
51 using namespace TTAProgram;
52 
53 /**
54  * Constructor.
55  *
56  * @param machine Target machine, ii Initiation interval.
57  */
59  const TTAMachine::Machine& machine, unsigned int ii):
60  ResourceManager(machine), director_(NULL), initiationInterval_(ii),
61  maxCycle_(INT_MAX-1) {
62 
64 }
65 
66 /**
67  * Factory method for creating resource managers.
68  *
69  * Checks a RM pool if a recyclable RM is found for same machine with same II,
70  * if found gives that. If not found, creates a new RM.
71  */
74  const TTAMachine::Machine& machine, unsigned int ii) {
75  std::map<int, std::list< SimpleResourceManager*> >& pool =
76  rmPool_[&machine];
77  std::list<SimpleResourceManager*>& iipool = pool[ii];
78  if (iipool.empty()) {
79  return new SimpleResourceManager(machine,ii);
80  } else {
81  SimpleResourceManager* rm = iipool.back();
82  iipool.pop_back();
83  return rm;
84  }
85 }
86 
87 /*
88  * Method which should be called when RM no longer needed.
89  *
90  * This puts the RM into a pool of resource managers which can be recycled.
91  */
93  SimpleResourceManager* rm, bool allowReuse) {
94  if (rm == NULL) return;
95  if (allowReuse) {
96  std::map<int, std::list< SimpleResourceManager*> >& pool =
97  rmPool_[&rm->machine()];
98  pool[rm->initiationInterval()].push_back(rm);
99  rm->clear();
100  } else {
101  delete rm;
103  }
104 }
105 
106 
107 /**
108  * Creates brokers and builds resource model.
109  *
110  */
112  const TTAMachine::Machine& machine) {
113 
114  // instantiate brokers
115 
116  std::vector<ResourceBroker*> brokers;
117 
118  InputFUBroker* ifb =
119  new InputFUBroker("InputFUBroker", initiationInterval_);
120  OutputFUBroker* ofb =
121  new OutputFUBroker("OutputFUBroker", initiationInterval_);
122  brokers.push_back(ifb);
123  brokers.push_back(ofb);
124  brokers.push_back(new ExecutionPipelineBroker(
125  "ExecutionPipelineBroker", initiationInterval_));
127  "InputPSocketBroker", *ifb, initiationInterval_);
128  brokers.push_back(ipsb);
129  brokers.push_back(new IUBroker("IUBroker", this, initiationInterval_));
131  "OutputPSocketBroker", *ofb, this, initiationInterval_);
132  brokers.push_back(opsb);
133  BusBroker* bb = new BusBroker(
134  "BusBroker", *ipsb, *opsb, machine,
136  brokers.push_back(bb);
137  brokers.push_back(
138  new ITemplateBroker(
139  "ITemplateBroker", *bb, this, initiationInterval_));
140 
141  ipsb->setBusBroker(*bb);
142  opsb->setBusBroker(*bb);
143 
144  // build resource model and assignment plan
145 
146  for (unsigned int i = 0; i < brokers.size(); i++) {
147  brokers[i]->setInitiationInterval(initiationInterval_);
148  buildDirector_.addBroker(*brokers[i]);
149  plan_.insertBroker(*brokers[i]);
150  }
151 
152  resources = brokers.size();
153 
155 
157 }
158 
159 /**
160  * Destructor.
161  */
163  delete director_;
164 }
165 
166 /**
167  * Return true if given node can be assigned without resource
168  * conflicts in given cycle.
169  *
170  * For those parts of the node that have
171  * been already assigned to a resource, the manager simply keeps the
172  * assignment and verifies that the resource is available. For those
173  * parts that are not yet assigned, the resource manager looks for any
174  * compatible resource that could be assigned.
175  *
176  * @param cycle Cycle.
177  * @param node Node.
178  * @param bus if not null, bus that has to be used.
179  * @param srcFU if not null, srcFu that has to be used.
180  * @param dstFU if not null, dstFU that has to be used.
181  * @param immWriteCycle if not -1 and src is imm, write cycle of limm.
182  * @return True if given node can be assigned without resource
183  * conflicts in given cycle, false otherwise.
184  */
185 bool
187  const TTAMachine::Bus* bus,
188  const TTAMachine::FunctionUnit* srcFU,
189  const TTAMachine::FunctionUnit* dstFU,
190  int immWriteCycle,
191  const TTAMachine::ImmediateUnit* immu,
192  int immRegIndex) const {
193 #ifdef DEBUG_RM
194  Application::logStream() << "\tCanAssign: " << cycle << " " <<
195  node.toString() << std::endl;
196 #endif
197  return director_->canAssign(
198  cycle, node, bus, srcFU, dstFU, immWriteCycle, immu, immRegIndex);
199 }
200 
201 /**
202  * Assign all resources needed by a given node starting from given
203  * cycle, and place the node in that cycle.
204  *
205  * The manager keeps any pre-existing assignment and verifies that
206  * assigned resource is available. For all unassigned parts of the
207  * node, the resource manager looks for and then assigns the necessary
208  * resources. If the node is not fully assigned after the invocation
209  * of this operation, it means the assignment attempt failed.
210  *
211  * @param cycle Cycle.
212  * @param node Node.
213  * @param bus if not null, bus that has to be used.
214  * @param srcFU if not null, srcFu that has to be used.
215  * @param dstFU if not null, dstFU that has to be used.
216  * @param immWriteCycle if not -1 and src is imm, write cycle of limm.
217  * @exception InvalidData exception if given node is already placed in a
218  * cycle different from given cycle.
219  */
220 void
222  const TTAMachine::Bus* bus,
223  const TTAMachine::FunctionUnit* srcFU,
224  const TTAMachine::FunctionUnit* dstFU,
225  int immWriteCycle,
226  const TTAMachine::ImmediateUnit* immu,
227  int immRegIndex) {
228 #ifdef DEBUG_RM
229  Application::logStream() << "\tAssign: " << cycle << " " <<
230  node.toString() << std::endl;
231 #endif
232  director_->assign(
233  cycle, node, bus, srcFU, dstFU, immWriteCycle, immu, immRegIndex);
234 #ifdef DEBUG_RM
235  Application::logStream() << "\tAssign: " << cycle << " " <<
236  node.toString() << " OK!" << std::endl;
237 #endif
238 }
239 
240 /**
241  * Free all resource assignments of the given node.
242  *
243  * If the node is only partially assigned, the resource manager
244  * ignores those parts of the node that are already unassigned.
245  *
246  * @param node Node to unassign.
247  * @exception InvalidData If the given node is not placed in any
248  * cycle. Assigned but not placed nodes are not considered by the
249  * resource manager.
250  */
251 void
253 {
254 #ifdef DEBUG_RM
255  Application::logStream() << "\tUnAssign: " << node.toString() << std::endl;
256 #endif
257  director_->unassign(node);
258 }
259 
260 /**
261  * Return the earliest cycle in the scope where all required resources
262  * can be assigned to the given node.
263  *
264  * If the node is partially assigned, the manager keeps existing
265  * assignments. This means that a client can apply arbitrary
266  * constraints to resource allocation.
267  *
268  * @param node Node.
269  * @param bus if not null, bus that has to be used.
270  * @param srcFU if not null, srcFu that has to be used.
271  * @param dstFU if not null, dstFU that has to be used.
272  * @param immWriteCycle if not -1 and src is imm, write cycle of limm.
273  * @return The earliest cycle in the scope where all required resources
274  * can be assigned to the given node. -1 if assignment is not possible
275  *
276  */
277 int
279  const TTAMachine::Bus* bus,
280  const TTAMachine::FunctionUnit* srcFU,
281  const TTAMachine::FunctionUnit* dstFU,
282  int immWriteCycle,
283  const TTAMachine::ImmediateUnit* immu,
284  int immRegIndex) const {
285  int ec = director_->earliestCycle(
286  node, bus, srcFU, dstFU, immWriteCycle, immu, immRegIndex);
287 #ifdef DEBUG_RM
288  Application::logStream() << "\tEC:" << node.toString() << std::endl;
289  Application::logStream() << "\t\tEC result is: " << ec << std::endl;
290 #endif
291  return ec;
292 }
293 
294 /**
295  * Return the earliest cycle starting from the given cycle in which
296  * required resources can be assigned to given node.
297  *
298  * If the node is partially assigned, the manager keeps existing
299  * assignments. This means that a client can apply arbitrary
300  * constraints to resource allocation.
301  *
302  * @param cycle Cycle to start from.
303  * @param node Node.
304  * @param bus if not null, bus that has to be used.
305  * @param srcFU if not null, srcFu that has to be used.
306  * @param dstFU if not null, dstFU that has to be used.
307  * @param immWriteCycle if not -1 and src is imm, write cycle of limm.
308  * @return The earliest cycle starting from the given cycle in which
309  * required resources can be assigned to given node. Returns -1 if assignment
310  * is not possible.
311  */
312 int
314  const TTAMachine::Bus* bus,
315  const TTAMachine::FunctionUnit* srcFU,
316  const TTAMachine::FunctionUnit* dstFU,
317  int immWriteCycle,
318  const TTAMachine::ImmediateUnit* immu,
319  int immRegIndex) const {
320 
321  int ec = director_->earliestCycle(
322  cycle, node, bus, srcFU, dstFU, immWriteCycle, immu, immRegIndex);
323 #ifdef DEBUG_RM
324  Application::logStream() << "\tEC: " << cycle << " " << node.toString()
325  << std::endl;
326  Application::logStream() << "\t\tEC result is: " << ec << std::endl;
327 #endif
328  return ec;
329 }
330 
331 /**
332  * Return the latest cycle in the scope where all required resources
333  * can be assigned to the given node.
334  *
335  * If the node is partially assigned, the manager keeps existing
336  * assignments. This means that a client can apply arbitrary
337  * constraints to resource allocation.
338  *
339  * @param node Node.
340  * @param bus if not null, bus that has to be used.
341  * @param srcFU if not null, srcFu that has to be used.
342  * @param dstFU if not null, dstFU that has to be used.
343  * @param immWriteCycle if not -1 and src is imm, write cycle of limm.
344  * @return The latest cycle in the scope where all required resources
345  * can be assigned to the given node. -1 if assignment is not possible.
346  * INT_MAX if there is no upper boundary for assignment.
347  */
348 int
350  const TTAMachine::Bus* bus,
351  const TTAMachine::FunctionUnit* srcFU,
352  const TTAMachine::FunctionUnit* dstFU,
353  int immWriteCycle,
354  const TTAMachine::ImmediateUnit* immu,
355  int immRegIndex) const {
356  int lc = director_->latestCycle(
357  node, bus, srcFU, dstFU, immWriteCycle, immu, immRegIndex);
358 #ifdef DEBUG_RM
359  Application::logStream() << "\tLC: " << node.toString() << std::endl;
360  Application::logStream() << "\t\tLC result is: " << lc << std::endl;
361 #endif
362  return lc;
363 }
364 
365 /**
366  * Return the latest cycle starting from the given cycle in which
367  * required resources can be assigned to given node.
368  *
369  * If the node is partially assigned, the manager keeps existing
370  * assignments. This means that a client can apply arbitrary
371  * constraints to resource allocation.
372  *
373  * @param cycle Cycle to start from.
374  * @param node Node.
375  * @param bus if not null, bus that has to be used.
376  * @param srcFU if not null, srcFu that has to be used.
377  * @param dstFU if not null, dstFU that has to be used.
378  * @param immWriteCycle if not -1 and src is imm, write cycle of limm.
379  * @return The latest cycle starting from the given cycle in which
380  * required resources can be assigned to given node. -1 if assignment is not
381  * possible.
382  */
383 int
385  const TTAMachine::Bus* bus,
386  const TTAMachine::FunctionUnit* srcFU,
387  const TTAMachine::FunctionUnit* dstFU,
388  int immWriteCycle,
389  const TTAMachine::ImmediateUnit* immu,
390  int immRegIndex) const {
391  int lc = director_->latestCycle(
392  cycle, node, bus, srcFU, dstFU, immWriteCycle, immu, immRegIndex);
393 #ifdef DEBUG_RM
394  Application::logStream() << "\tLC: " << cycle << " " << node.toString()
395  << std::endl;
396  Application::logStream() << "\t\tLC result is: " << lc << std::endl;
397 #endif
398  return lc;
399 }
400 
401 /**
402  * Tests if immediate of MoveNode can be transported by any of
403  * buses of present machine.
404  *
405  * @param node MoveNode that contains immediate that we test
406  * @param bus if non-null, only check immediate from that bus
407  * @return true if the immediate in node can be transported by
408  * some bus
409  */
410 bool
412  const MoveNode& node, const TTAMachine::Bus* preassignedBus) const {
413  return director_->canTransportImmediate(node, preassignedBus);
414 }
415 
416 /**
417  * Tests if any of a buses of machine supports guard needed
418  * by a node. Should always return true! Otherwise, scheduler generated
419  * code for different machine.
420  *
421  * @param node MoveNode to test
422  * @return true if any of buses supports guard needed by node, or if move
423  * is not conditional.
424  */
425 bool
427  return director_->hasGuard(node);
428 }
429 
430 /**
431  * Returns instruction that holds a moves for given cycle
432  * and has correct template set.
433  *
434  * The instruction ownedship stays in the resource manager until
435  * loseInstructionOwnership() is called.
436  *
437  * @param cycle Cycle for which to get instruction
438  * @return the Instruction with moves and template assigned
439  * @note This method should be called when whole scope is scheduled
440  */
443  return director_->instruction(cycle);
444 }
445 
446 /**
447  * Defines if Resource Manager implementation supports node with resources
448  * pre assigned by clients.
449  *
450  * @return For SimpleResourceManager allways false.
451  */
452 bool
455 }
456 
457 /**
458  * Returns largest cycle known to be used by any of the resources.
459  *
460  * @return Largest cycle resource manager assigned any resource to.
461  */
462 int
464 #ifdef DEBUG_RM
465  Application::logStream() << "\tLargestC." << std::endl;
466  int lc = director_->largestCycle();
467  Application::logStream() << "\tLargestC got: " << lc << std::endl;
468  return lc;
469 #else
470  return director_->largestCycle();
471 #endif
472 }
473 
474 /**
475  * Returns smallest cycle known to be used by any of the resources.
476  *
477  * @return Smallest cycle resource manager assigned any resource to.
478  */
479 int
481 #ifdef DEBUG_RM
482  Application::logStream() << "\tSC." << std::endl;
483  int sc = director_->smallestCycle();
484  Application::logStream() << "\tSC got: " << sc << std::endl;
485  return sc;
486 #else
487  return director_->smallestCycle();
488 #endif
489 }
490 
491 /**
492  * Transfer the instruction ownership away from this object,
493  *
494  * If this method is called, resource manager does not delete it's
495  * instructions when it it destroyed.
496  */
497 void
500 }
501 
502 /**
503  * Finds the original terminal with value of immediate.
504  *
505  * @param node node with immediate register source
506  * @return terminal with immediate value
507  */
508 std::shared_ptr<TTAProgram::TerminalImmediate>
510  return director_->immediateValue(node);
511 }
512 
513 /**
514  * Finds cycle in which the immediate that is read by node is written.
515  *
516  * @param node with source immediate register
517  * @return cycle in which immediate is written to register
518  */
519 int
521  return director_->immediateWriteCycle(node);
522 }
523 
524 /**
525  * Return the instruction index corresponding to cycle.
526  *
527  * If modulo scheduling is not used (ie. initiation interval is 0), then
528  * index is equal to cycle.
529  *
530  * @param cycle Cycle to get instruction index.
531  * @return Return the instruction index for cycle.
532  */
533 unsigned int
534 SimpleResourceManager::instructionIndex(unsigned int cycle) const {
535  if (initiationInterval_ != 0) {
536  return cycle % initiationInterval_;
537  } else {
538  return cycle;
539  }
540 }
541 
542 bool
544  int defCycle,
545  std::shared_ptr<TTAProgram::Immediate> immediate) const {
546 
547  return director_->isTemplateAvailable(defCycle, immediate);
548 }
549 
550 /**
551  * Return the total number of resources.
552  *
553  * @return Return the total number of resources.
554  */
555 unsigned int
557  return resources;
558 }
559 
560 /**
561  * Print the contents of resource manager.
562  *
563  * @param stream target stream where to print
564  */
565 void
566 SimpleResourceManager::print(std::ostream& target) const {
567  if (initiationInterval_ == 0) {
568  buildDirector_.print(target, 10);
569  } else {
571  }
572 
573 }
574 
575 /**
576  *
577  * Print the contents of resource manager.
578  *
579  * @return Return string containing the resource table.
580  */
581 std::string
583 
584  std::stringstream temp;
585 
586  if (initiationInterval_ == 0) {
587  buildDirector_.print(temp, 10);
588  } else {
590  }
591 
592  std::string target = "";
593  std::string result = "";
594 
595  while (getline(temp, target)) {
596  // read temp to target
597  target += "\n";
598  result += target;
599  };
600 
601  return result;
602 }
603 
604 /**
605  * Clears bookkeeping which is needed for unassigning previously assigned
606  * moves. After this call these cannot be unassigned, but new moves which
607  * are assigned after this call can still be unassigned.
608  */
609 void
612 }
613 
614 /**
615  * Clears a resource manager so that it can be reused for different BB.
616  *
617  * After this call the state of the RM should be identical to a new RM.
618  */
622  director_->clear();
623  setDDG(NULL);
624  setCFG(NULL);
625  setBBN(NULL);
626 }
627 
628 void
630  director_->setDDG(ddg);
631 }
632 
633 void
635  director_->setCFG(cfg);
636 }
637 
638 void
640  director_->setBBN(bbn);
641 }
642 
643 std::map<const TTAMachine::Machine*,
644  std::map<int, std::list< SimpleResourceManager*> > >
646 
647 void SimpleResourceManager::setMaxCycle(unsigned int maxCycle) {
650 }
651 
SimpleResourceManager::rmPool_
static std::map< const TTAMachine::Machine *, std::map< int, std::list< SimpleResourceManager * > > > rmPool_
Definition: SimpleResourceManager.hh:169
TTAProgram
Definition: Estimator.hh:65
SimpleResourceManager::immediateWriteCycle
virtual int immediateWriteCycle(const MoveNode &) const
Definition: SimpleResourceManager.cc:520
SimpleResourceManager::buildResourceModel
void buildResourceModel(const TTAMachine::Machine &machine)
Definition: SimpleResourceManager.cc:111
SimpleResourceManager::canAssign
virtual bool canAssign(int cycle, MoveNode &node, const TTAMachine::Bus *bus=NULL, const TTAMachine::FunctionUnit *srcFU=NULL, const TTAMachine::FunctionUnit *dstFU=NULL, int immWriteCycle=-1, const TTAMachine::ImmediateUnit *immu=nullptr, int immRegIndex=-1) const override
Definition: SimpleResourceManager.cc:186
SimpleBrokerDirector::latestCycle
virtual int latestCycle(MoveNode &node, const TTAMachine::Bus *bus=nullptr, const TTAMachine::FunctionUnit *srcFU=nullptr, const TTAMachine::FunctionUnit *dstFU=nullptr, int immWriteCycle=-1, const TTAMachine::ImmediateUnit *immu=nullptr, int immRegIndex=-1) const override
Definition: SimpleBrokerDirector.cc:560
SimpleBrokerDirector::clear
void clear()
Definition: SimpleBrokerDirector.cc:944
SimpleResourceManager::largestCycle
virtual int largestCycle() const override
Definition: SimpleResourceManager.cc:463
MoveNode::toString
std::string toString() const
Definition: MoveNode.cc:576
ExecutionPipelineResourceTable::finalize
static void finalize()
Definition: ExecutionPipelineResourceTable.cc:185
machine
TTAMachine::Machine * machine
the architecture definition of the estimated processor
Definition: EstimatorCmdLineUI.cc:59
SimpleBrokerDirector::unassign
virtual void unassign(MoveNode &node) override
Definition: SimpleBrokerDirector.cc:340
ResourceBuildDirector::clear
void clear()
Definition: ResourceBuildDirector.cc:178
SimpleBrokerDirector::smallestCycle
virtual int smallestCycle() const override
Definition: SimpleBrokerDirector.cc:859
SimpleBrokerDirector::isTemplateAvailable
virtual bool isTemplateAvailable(int, std::shared_ptr< TTAProgram::Immediate >) const
Definition: SimpleBrokerDirector.cc:899
SimpleBrokerDirector::clearOldResources
void clearOldResources()
Definition: SimpleBrokerDirector.cc:913
SimpleBrokerDirector::hasGuard
virtual bool hasGuard(const MoveNode &node) const
Definition: SimpleBrokerDirector.cc:811
TTAProgram::Instruction
Definition: Instruction.hh:57
SimpleResourceManager::smallestCycle
virtual int smallestCycle() const override
Definition: SimpleResourceManager.cc:480
TTAMachine::Bus
Definition: Bus.hh:53
SequenceTools.hh
SimpleResourceManager::immediateValue
virtual std::shared_ptr< TTAProgram::TerminalImmediate > immediateValue(const MoveNode &)
Definition: SimpleResourceManager.cc:509
SimpleBrokerDirector::canAssign
virtual bool canAssign(int cycle, MoveNode &node, const TTAMachine::Bus *bus=nullptr, const TTAMachine::FunctionUnit *srcFU=nullptr, const TTAMachine::FunctionUnit *dstFU=nullptr, int immWriteCycle=-1, const TTAMachine::ImmediateUnit *immu=nullptr, int immRegIndex=-1) const override
Definition: SimpleBrokerDirector.cc:120
SimpleBrokerDirector::assign
virtual void assign(int cycle, MoveNode &node, const TTAMachine::Bus *bus=nullptr, const TTAMachine::FunctionUnit *srcFU=nullptr, const TTAMachine::FunctionUnit *dstFU=nullptr, int immWriteCycle=-1, const TTAMachine::ImmediateUnit *immu=nullptr, int immRegIndex=-1) override
Definition: SimpleBrokerDirector.cc:236
SimpleResourceManager::setCFG
void setCFG(const ControlFlowGraph *cfg)
Definition: SimpleResourceManager.cc:634
InputPSocketBroker
Definition: InputPSocketBroker.hh:51
IUBroker.hh
MoveNode
Definition: MoveNode.hh:65
SimpleBrokerDirector::canTransportImmediate
virtual bool canTransportImmediate(const MoveNode &node, const TTAMachine::Bus *preAssignedBus) const
Definition: SimpleBrokerDirector.cc:680
SimpleBrokerDirector::loseInstructionOwnership
virtual void loseInstructionOwnership(int cycle)
Definition: SimpleBrokerDirector.cc:872
ITemplateBroker
Definition: ITemplateBroker.hh:65
SimpleResourceManager::assign
virtual void assign(int cycle, MoveNode &node, const TTAMachine::Bus *bus=NULL, const TTAMachine::FunctionUnit *srcFU=NULL, const TTAMachine::FunctionUnit *dstFU=NULL, int immWriteCycle=-1, const TTAMachine::ImmediateUnit *immu=nullptr, int immRegIndex=-1) override
Definition: SimpleResourceManager.cc:221
Application::logStream
static std::ostream & logStream()
Definition: Application.cc:155
SimpleResourceManager::initiationInterval
virtual unsigned initiationInterval() const
Definition: SimpleResourceManager.hh:135
SimpleResourceManager::unassign
virtual void unassign(MoveNode &node) override
Definition: SimpleResourceManager.cc:252
SimpleResourceManager::clearOldResources
virtual void clearOldResources()
Definition: SimpleResourceManager.cc:610
OutputPSocketBroker::setBusBroker
void setBusBroker(ResourceBroker &sb)
Definition: OutputPSocketBroker.cc:511
OutputFUBroker
Definition: OutputFUBroker.hh:50
SimpleResourceManager::~SimpleResourceManager
virtual ~SimpleResourceManager()
Definition: SimpleResourceManager.cc:162
AssignmentPlan::insertBroker
void insertBroker(ResourceBroker &broker)
Definition: AssignmentPlan.cc:68
TTAMachine::FunctionUnit
Definition: FunctionUnit.hh:55
BusBroker
Definition: BusBroker.hh:60
SimpleResourceManager::hasGuard
virtual bool hasGuard(const MoveNode &node) const
Definition: SimpleResourceManager.cc:426
ExecutionPipelineBroker.hh
SimpleResourceManager::clear
void clear()
Clears all bookkeeping done by this RM. The RM can then be reused for different BB.
Definition: SimpleResourceManager.cc:619
Instruction.hh
SimpleBrokerDirector.hh
BusBroker.hh
SimpleBrokerDirector::earliestCycle
virtual int earliestCycle(MoveNode &node, const TTAMachine::Bus *bus=nullptr, const TTAMachine::FunctionUnit *srcFU=nullptr, const TTAMachine::FunctionUnit *dstFU=nullptr, int immWriteCycle=-1, const TTAMachine::ImmediateUnit *immu=nullptr, int immRegIndex=-1) const override
Definition: SimpleBrokerDirector.cc:457
SimpleBrokerDirector::setBBN
void setBBN(const BasicBlockNode *bbn)
Definition: SimpleBrokerDirector.cc:962
OutputFUBroker.hh
SimpleBrokerDirector::largestCycle
virtual int largestCycle() const override
Definition: SimpleBrokerDirector.cc:848
ResourceManager
Definition: ResourceManager.hh:53
BasicBlockNode
Definition: BasicBlockNode.hh:64
SimpleResourceManager::earliestCycle
virtual int earliestCycle(MoveNode &node, const TTAMachine::Bus *bus=NULL, const TTAMachine::FunctionUnit *srcFU=NULL, const TTAMachine::FunctionUnit *dstFU=NULL, int immWriteCycle=-1, const TTAMachine::ImmediateUnit *immu=nullptr, int immRegIndex=-1) const override
Definition: SimpleResourceManager.cc:278
SimpleBrokerDirector::setCFG
void setCFG(const ControlFlowGraph *cfg)
Definition: SimpleBrokerDirector.cc:957
OutputPSocketBroker.hh
SimpleResourceManager::disposeRM
static void disposeRM(SimpleResourceManager *rm, bool allowReuse=true)
Definition: SimpleResourceManager.cc:92
SimpleBrokerDirector::setDDG
void setDDG(const DataDependenceGraph *ddg)
Definition: SimpleBrokerDirector.cc:952
SimpleBrokerDirector::immediateValue
virtual std::shared_ptr< TTAProgram::TerminalImmediate > immediateValue(const MoveNode &)
Definition: SimpleBrokerDirector.cc:883
ResourceBuildDirector::build
void build(const TTAMachine::Machine &machine)
Definition: ResourceBuildDirector.cc:75
OutputPSocketBroker
Definition: OutputPSocketBroker.hh:51
SimpleResourceManager::SimpleResourceManager
SimpleResourceManager(const TTAMachine::Machine &machine, unsigned int ii=0)
Definition: SimpleResourceManager.cc:58
InputPSocketBroker::setBusBroker
void setBusBroker(ResourceBroker &sb)
Definition: InputPSocketBroker.cc:391
SimpleBrokerDirector
Definition: SimpleBrokerDirector.hh:67
SimpleResourceManager::createRM
static SimpleResourceManager * createRM(const TTAMachine::Machine &machine, unsigned int ii=0)
Definition: SimpleResourceManager.cc:73
SimpleBrokerDirector::immediateWriteCycle
virtual int immediateWriteCycle(const MoveNode &) const
Definition: SimpleBrokerDirector.cc:894
SimpleResourceManager::instructionIndex
unsigned int instructionIndex(unsigned int) const
Definition: SimpleResourceManager.cc:534
SimpleResourceManager::resourceCount
virtual unsigned int resourceCount() const
Definition: SimpleResourceManager.cc:556
SimpleResourceManager::maxCycle_
unsigned int maxCycle_
Definition: SimpleResourceManager.hh:163
SimpleResourceManager::print
virtual void print(std::ostream &target) const
Definition: SimpleResourceManager.cc:566
SimpleResourceManager::director_
SimpleBrokerDirector * director_
Resource manager's broker director.
Definition: SimpleResourceManager.hh:156
SimpleResourceManager::setMaxCycle
void setMaxCycle(unsigned int maxCycle)
Definition: SimpleResourceManager.cc:647
ResourceBuildDirector::addBroker
void addBroker(ResourceBroker &broker)
Definition: ResourceBuildDirector.cc:61
SimpleResourceManager::canTransportImmediate
virtual bool canTransportImmediate(const MoveNode &node, const TTAMachine::Bus *preAssignedBus=NULL) const
Definition: SimpleResourceManager.cc:411
ResourceManager::machine
const TTAMachine::Machine & machine() const
Definition: ResourceManager.cc:56
SimpleResourceManager::setDDG
void setDDG(const DataDependenceGraph *ddg)
Definition: SimpleResourceManager.cc:629
SimpleBrokerDirector::instruction
virtual TTAProgram::Instruction * instruction(int cycle) const override
Definition: SimpleBrokerDirector.cc:827
SimpleResourceManager::plan_
AssignmentPlan plan_
Resource assignment plan.
Definition: SimpleResourceManager.hh:158
ITemplateBroker.hh
SimpleResourceManager::buildDirector_
ResourceBuildDirector buildDirector_
Resource build director.
Definition: SimpleResourceManager.hh:160
DataDependenceGraph
Definition: DataDependenceGraph.hh:67
SimpleResourceManager::latestCycle
virtual int latestCycle(MoveNode &node, const TTAMachine::Bus *bus=NULL, const TTAMachine::FunctionUnit *srcFU=NULL, const TTAMachine::FunctionUnit *dstFU=NULL, int immWriteCycle=-1, const TTAMachine::ImmediateUnit *immu=nullptr, int immRegIndex=-1) const override
Definition: SimpleResourceManager.cc:349
SimpleResourceManager::isTemplateAvailable
virtual bool isTemplateAvailable(int, std::shared_ptr< TTAProgram::Immediate >) const
Definition: SimpleResourceManager.cc:543
SimpleResourceManager::setBBN
void setBBN(const BasicBlockNode *bbn)
Definition: SimpleResourceManager.cc:639
SimpleResourceManager::maxCycle
int maxCycle()
Definition: SimpleResourceManager.hh:142
SimpleResourceManager::loseInstructionOwnership
virtual void loseInstructionOwnership(int cycle)
Definition: SimpleResourceManager.cc:498
SimpleResourceManager::initiationInterval_
unsigned int initiationInterval_
Definition: SimpleResourceManager.hh:162
SimpleResourceManager.hh
SimpleBrokerDirector::supportsExternalAssignments
virtual bool supportsExternalAssignments() const override
Definition: SimpleBrokerDirector.cc:838
SimpleResourceManager
Definition: SimpleResourceManager.hh:58
InputFUBroker
Definition: InputFUBroker.hh:55
SimpleResourceManager::supportsExternalAssignments
virtual bool supportsExternalAssignments() const override
Definition: SimpleResourceManager.cc:453
ResourceBuildDirector::print
void print(std::ostream &target_, unsigned int cycles) const
Definition: ResourceBuildDirector.cc:102
InputFUBroker.hh
SimpleResourceManager::toString
virtual std::string toString() const
Definition: SimpleResourceManager.cc:582
InputPSocketBroker.hh
ExecutionPipelineBroker
Definition: ExecutionPipelineBroker.hh:53
ExecutionPipelineResourceTable.hh
IUBroker
Definition: IUBroker.hh:57
ControlFlowGraph
Definition: ControlFlowGraph.hh:100
TTAMachine::Machine
Definition: Machine.hh:73
SimpleResourceManager::resources
unsigned int resources
Definition: SimpleResourceManager.hh:165
SimpleResourceManager::instruction
virtual TTAProgram::Instruction * instruction(int cycle) const override
Definition: SimpleResourceManager.cc:442
SimpleBrokerDirector::setMaxCycle
void setMaxCycle(unsigned int cycle)
Definition: SimpleBrokerDirector.cc:967
TTAMachine::ImmediateUnit
Definition: ImmediateUnit.hh:50