addPackage(const std::string &packageName) | ProGe::BaseNetlistBlock | protected |
addParameter(const Parameter ¶m) | ProGe::BaseNetlistBlock | protected |
addPort(NetlistPort *port) | ProGe::BaseNetlistBlock | protected |
addPortGroup(NetlistPortGroup *portGroup) | ProGe::BaseNetlistBlock | protected |
addSubBlock(BaseNetlistBlock *subBlock, const std::string &instanceName="") | ProGe::BaseNetlistBlock | protected |
BaseNetlistBlock() | ProGe::BaseNetlistBlock | |
BaseNetlistBlock(BaseNetlistBlock *parent) | ProGe::BaseNetlistBlock | explicit |
BaseNetlistBlock(const std::string &moduleName, const std::string &instanceName, BaseNetlistBlock *parent=nullptr) | ProGe::BaseNetlistBlock | |
BaseNetlistBlock(const BaseNetlistBlock &) | ProGe::BaseNetlistBlock | private |
BlockContainerType typedef | ProGe::BaseNetlistBlock | |
build() override | ProGe::BaseNetlistBlock | virtual |
connect() override | ProGe::BaseNetlistBlock | virtual |
connectClocks() | ProGe::BaseNetlistBlock | protected |
connectResets() | ProGe::BaseNetlistBlock | protected |
deleteSubBlock(BaseNetlistBlock *subBlock) | ProGe::BaseNetlistBlock | protected |
finalize() override | ProGe::BaseNetlistBlock | virtual |
findPort(const std::string &portName, bool recursiveSearch=false, bool partialMatch=true) const | ProGe::BaseNetlistBlock | protected |
hasParameter(const std::string &name) const | ProGe::BaseNetlistBlock | virtual |
hasParentBlock() const | ProGe::BaseNetlistBlock | virtual |
hasPortsBy(SignalType type) const | ProGe::BaseNetlistBlock | virtual |
hasSubBlock(const std::string &instanceName) const | ProGe::BaseNetlistBlock | virtual |
input_ | ProGe::InverterBlock | private |
inputPort() const | ProGe::InverterBlock | |
instanceName() const | ProGe::BaseNetlistBlock | |
instanceName_ | ProGe::BaseNetlistBlock | private |
invertedOut_ | ProGe::InverterBlock | private |
InverterBlock(const NetlistPort &input, const NetlistPort &output) | ProGe::InverterBlock | |
InverterBlock() | ProGe::InverterBlock | private |
isLeaf() const | ProGe::BaseNetlistBlock | inlinevirtual |
isSubBlock(const BaseNetlistBlock &block) const | ProGe::BaseNetlistBlock | virtual |
isVirtual() const | ProGe::BaseNetlistBlock | inlinevirtual |
moduleName() const | ProGe::BaseNetlistBlock | |
moduleName_ | ProGe::BaseNetlistBlock | private |
name() const | ProGe::BaseNetlistBlock | |
netlist() const | ProGe::BaseNetlistBlock | virtual |
netlist() | ProGe::BaseNetlistBlock | protected |
netlist_ | ProGe::BaseNetlistBlock | private |
operator=(const BaseNetlistBlock &) | ProGe::BaseNetlistBlock | private |
outputPort() const | ProGe::InverterBlock | |
package(size_t idx) const | ProGe::BaseNetlistBlock | virtual |
packageCount() const | ProGe::BaseNetlistBlock | virtual |
packages_ | ProGe::BaseNetlistBlock | private |
parameter(const std::string &name) const | ProGe::BaseNetlistBlock | virtual |
parameter(size_t index) const | ProGe::BaseNetlistBlock | virtual |
parameter(const std::string &name) | ProGe::BaseNetlistBlock | protected |
ParameterContainerType typedef | ProGe::BaseNetlistBlock | |
parameterCount() const | ProGe::BaseNetlistBlock | virtual |
parameters_ | ProGe::BaseNetlistBlock | private |
parent_ | ProGe::BaseNetlistBlock | private |
parentBlock() const | ProGe::BaseNetlistBlock | virtual |
parentBlock() | ProGe::BaseNetlistBlock | protectedvirtual |
port(size_t index) const | ProGe::BaseNetlistBlock | virtual |
port(const std::string &portName, bool partialMatch=true) const | ProGe::BaseNetlistBlock | virtual |
port(size_t index) | ProGe::BaseNetlistBlock | protectedvirtual |
portBy(SignalType type, size_t index=0) const | ProGe::BaseNetlistBlock | virtual |
PortContainerType typedef | ProGe::BaseNetlistBlock | |
portCount() const | ProGe::BaseNetlistBlock | virtual |
portGroup(size_t index) const | ProGe::BaseNetlistBlock | virtual |
PortGroupContainerType typedef | ProGe::BaseNetlistBlock | |
portGroupCount() const | ProGe::BaseNetlistBlock | virtual |
portGroups_ | ProGe::BaseNetlistBlock | private |
portGroupsBy(SignalGroupType type) const | ProGe::BaseNetlistBlock | virtual |
ports() | ProGe::BaseNetlistBlock | inline |
ports_ | ProGe::BaseNetlistBlock | private |
portsBy(SignalType type) const | ProGe::BaseNetlistBlock | virtual |
removePort(NetlistPort *port) | ProGe::BaseNetlistBlock | protected |
removePortGroup(NetlistPortGroup *portGroup) | ProGe::BaseNetlistBlock | protected |
removeSubBlock(BaseNetlistBlock *subBlock) | ProGe::BaseNetlistBlock | protected |
setInstanceName(const std::string &name) | ProGe::BaseNetlistBlock | |
setModuleName(const std::string &name) | ProGe::BaseNetlistBlock | protected |
setParameter(const Parameter ¶m) | ProGe::BaseNetlistBlock | protected |
setParent(BaseNetlistBlock *parent) | ProGe::BaseNetlistBlock | privatevirtual |
shallowCopy(const std::string &instanceName="") const | ProGe::BaseNetlistBlock | |
subBlock(size_t index) const | ProGe::BaseNetlistBlock | virtual |
subBlock(size_t index) | ProGe::BaseNetlistBlock | protectedvirtual |
subBlockCount() const | ProGe::BaseNetlistBlock | virtual |
subBlocks_ | ProGe::BaseNetlistBlock | private |
write(const Path &targetBaseDir, HDL targetLang=VHDL) const override | ProGe::BaseNetlistBlock | virtual |
writeSelf(const Path &targetBaseDir, HDL targetLang=VHDL) const | ProGe::BaseNetlistBlock | virtual |
~BaseNetlistBlock() | ProGe::BaseNetlistBlock | virtual |
~IGenerationPhases() | ProGe::IGenerationPhases | inlinevirtual |
~InverterBlock() | ProGe::InverterBlock | virtual |