OpenASIP  2.0
VLIWConnectIC Member List

This is the complete list of members for VLIWConnectIC, including all inherited members.

addConfToDSDB(const DSDBManager::MachineConfiguration &conf)DesignSpaceExplorer
addParameter(TCEString name, ExplorerPluginParameterType type, bool compulsory=true, TCEString defaultValue="", TCEString description="")DesignSpaceExplorerPlugininline
booleanValue(const std::string &parameter) constDesignSpaceExplorerPluginvirtual
checkParameters() constDesignSpaceExplorerPluginprotected
createBus(TTAMachine::Machine *mach, int width)VLIWConnectICinlineprotected
createEstimateData(const TTAMachine::Machine &mach, const IDF::MachineImplementation &idf, CostEstimator::AreaInGates &area, CostEstimator::DelayInNanoSeconds &longestPathDelay)DesignSpaceExplorer
createImplementation(const DSDBManager::MachineConfiguration &conf, DSDBManager::MachineConfiguration &newConf, const double &frequency=0.0, const double &maxArea=0.0, const bool &createEstimates=true, const std::string &icDec="DefaultICDecoder", const std::string &icDecHDB="asic_130nm_1.5V.hdb")DesignSpaceExplorer
createImplementationAndStore(const DSDBManager::MachineConfiguration &conf, const double &frequency=0.0, const double &maxArea=0.0, const bool &createEstimates=true, const std::string &icDec="DefaultICDecoder", const std::string &icDecHDB="asic_130nm_1.5V.hdb")DesignSpaceExplorer
db()DesignSpaceExplorervirtual
description() constDesignSpaceExplorerPlugininlinevirtual
DesignSpaceExplorer()DesignSpaceExplorer
DesignSpaceExplorerPlugin()DesignSpaceExplorerPluginprotected
distinctBusWidths_VLIWConnectICprotected
dsdb_DesignSpaceExplorerprivate
dummyEstimate_DesignSpaceExplorerprivatestatic
estimator_DesignSpaceExplorerprivate
evaluate(const DSDBManager::MachineConfiguration &configuration, CostEstimates &results=dummyEstimate_, bool estimate=false)DesignSpaceExplorervirtual
explore(const RowID &configurationID, const unsigned int &)VLIWConnectICinlineprivatevirtual
getPlugins()DesignSpaceExplorer
giveParameter(const std::string &name, const std::string &value)DesignSpaceExplorerPluginvirtual
hasParameter(const std::string &paramName) constDesignSpaceExplorerPluginvirtual
loadExplorerPlugin(const std::string &pluginName, DSDBManager *dsdb=NULL)DesignSpaceExplorerstatic
longImmediateBusCount_VLIWConnectICprotected
longImmediateBusCountPN_VLIWConnectICprotectedstatic
name() constDesignSpaceExplorerPluginvirtual
oStream_DesignSpaceExplorerprivate
Parameter typedefDesignSpaceExplorerPlugin
ParameterMap typedefDesignSpaceExplorerPlugin
parameters() constDesignSpaceExplorerPlugin
parameters_DesignSpaceExplorerPluginprotected
parameterValue(const std::string &paramName) constDesignSpaceExplorerPlugin
PLUGIN_DESCRIPTION("Arranges architecture FUs into a VLIW-like " "interconnection by adding separate RF for each distinct bus width.")VLIWConnectICprivate
pluginName_DesignSpaceExplorerPluginprotected
pluginTool_DesignSpaceExplorerprivatestatic
PMCIt typedefDesignSpaceExplorerPlugin
PMIt typedefDesignSpaceExplorerPlugin
producesArchitecture() constVLIWConnectICinlineprivatevirtual
readCompulsoryParameter(const std::string paramName, T &param) constDesignSpaceExplorerPlugin
readOptionalParameter(const std::string paramName, T &param) constDesignSpaceExplorerPlugin
readParameters()VLIWConnectICinlineprotected
requiresApplication() constVLIWConnectICinlineprivatevirtual
requiresHDB() constVLIWConnectICinlineprivatevirtual
requiresSimulationData() constVLIWConnectICinlineprivatevirtual
requiresStartingPointArchitecture() constVLIWConnectICinlineprivatevirtual
schedule(const std::string applicationFile, TTAMachine::Machine &machine, TCEString paramOptions="-O3")DesignSpaceExplorerprotected
selectComponents(const TTAMachine::Machine &mach, const double &frequency=0.0, const double &maxArea=0.0, const std::string &icDec="DefaultICDecoder", const std::string &icDecHDB="asic_130nm_1.5V.hdb") constDesignSpaceExplorer
setDSDB(DSDBManager &dsdb)DesignSpaceExplorervirtual
setPluginName(const std::string &pluginName)DesignSpaceExplorerPluginvirtual
shortImmediateWidth_VLIWConnectICprotected
shortImmediateWidthPN_VLIWConnectICprotectedstatic
simulate(const TTAProgram::Program &program, const TTAMachine::Machine &machine, const TestApplication &testApplication, const ClockCycleCount &maxCycles, ClockCycleCount &runnedCycles, const bool tracing, const bool useCompiledSimulation=false, std::vector< ClockCycleCount > *executionCounts=NULL)DesignSpaceExplorerprotected
VLIWConnectIC()VLIWConnectICinlineprivate
widthIndex(int width)VLIWConnectICinlineprotected
wipeRegisterFile_VLIWConnectICprotected
wipeRegisterFilePN_VLIWConnectICprotectedstatic
~DesignSpaceExplorer()DesignSpaceExplorervirtual
~DesignSpaceExplorerPlugin()DesignSpaceExplorerPluginvirtual