OpenASIP 2.2
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RemoteController.hh
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1/*
2 This file is part of TTA-Based Codesign Environment (TCE).
3
4 Permission is hereby granted, free of charge, to any person obtaining a
5 copy of this software and associated documentation files (the "Software"),
6 to deal in the Software without restriction, including without limitation
7 the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 and/or sell copies of the Software, and to permit persons to whom the
9 Software is furnished to do so, subject to the following conditions:
10
11 The above copyright notice and this permission notice shall be included in
12 all copies or substantial portions of the Software.
13
14 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 DEALINGS IN THE SOFTWARE.
21*/
22/**
23 * @file RemoteController.hh
24 * @author Kalle Raiskila 2014
25 *
26 * Declaration of the RemoteController class.
27 */
28
29#ifndef TTA_REMOTE_CONTROLLER
30#define TTA_REMOTE_CONTROLLER
31
32#include "BaseType.hh"
34#include "AddressSpace.hh"
35#include <sstream>
36
38
39/**
40 * RemoteController is a "simulation" controller base class for debuggers
41 * on hardware implementations.
42 *
43 * RemoteController is a base class for the TCE built-in debugger and the
44 * custom debugger classes. It adds virtual interfaces to TTASimulationController,
45 * that are needed to integrate an FPGA or ASIC to the TCE debugging tools.
46 * RemoteController is a interface class, and cannot be instantiated.
47 */
49public:
51
56
57 /**
58 * Write data to physical memory.
59 *
60 * @param address TTA's view of the memory address to which to write
61 * @data one MAU of data to write. Needs to be masked, if MAU is
62 * less than maximum MAU size.
63 * @space the address space in which to write the data.
64 */
65 virtual void writeMem(Word address, MAU data, const AddressSpace&) = 0;
66
67 /**
68 * Read data from physical memory.
69 *
70 * @param address TTA's view of the memory address from which to read
71 * @space the address space from which to read the data.
72 * @return one MAU of data to write. (TODO: is return value masked or not?)
73 */
74 virtual MAU readMem(Word address, const AddressSpace&) = 0;
75
76 /**
77 * Create and load instruction memory image from current program.
78 *
79 * This function generates a binary image of the instruction
80 * memory, and stores it in cache. It is then written with loadInstructions(),
81 * which in turn call the pure virtual writeIMem, that subclasses need
82 * to implement.
83 */
84 virtual void loadIMemImage();
85
86 /**
87 * Write to phyical instruction memory.
88 *
89 * @param address TTA's view of the memory address to which to write
90 * @data buffer of raw data to write to instruction memory
91 * @size the size of the data buffer, in bytes
92 */
93 virtual void writeIMem(const char *data, int size) = 0;
94
95 // virtual members from TTASimulationController
96 virtual void step(double count = 1) = 0;
97
98 virtual void next(int count = 1) = 0;
99
100 virtual void run() = 0;
101
102 virtual void runUntil(UIntWord address) = 0;
103
104 virtual void reset() = 0;
105
106 virtual std::string registerFileValue(
107 const std::string& rfName,
108 int registerIndex = -1) = 0;
109
111 const std::string& iuName, int index = -1) = 0;
112
114 const std::string& fuName,
115 const std::string& portName) = 0;
116
118
119protected:
120 std::set<InstructionAddress> exitPoints;
121 std::ostringstream imemImage;
122};
123
124#endif
125
126/* vim: set ts=4 expandtab: */
127
Word UIntWord
Definition BaseType.hh:144
Word MinimumAddressableUnit
Type for storing a MAU (must be unsigned type!). This limits the maximum size of the simulated minimu...
Definition BaseType.hh:184
UInt32 InstructionAddress
Definition BaseType.hh:175
TTAMachine::Machine * machine
the architecture definition of the estimated processor
find Finds info of the inner loops in the program
virtual void writeMem(Word address, MAU data, const AddressSpace &)=0
virtual SimValue immediateUnitRegisterValue(const std::string &iuName, int index=-1)=0
virtual void next(int count=1)=0
virtual void step(double count=1)=0
virtual void loadIMemImage()
virtual MAU readMem(Word address, const AddressSpace &)=0
virtual SimValue FUPortValue(const std::string &fuName, const std::string &portName)=0
std::set< InstructionAddress > exitPoints
virtual void run()=0
virtual void runUntil(UIntWord address)=0
virtual InstructionAddress programCounter() const =0
virtual std::string registerFileValue(const std::string &rfName, int registerIndex=-1)=0
std::ostringstream imemImage
virtual void reset()=0
virtual void writeIMem(const char *data, int size)=0
MinimumAddressableUnit MAU
virtual SimulatorFrontend & frontend()