OpenASIP 2.2
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ScheduleEstimator.cc
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1/*
2 Copyright (c) 2002-2013 Tampere University.
3
4 This file is part of TTA-Based Codesign Environment (TCE).
5
6 Permission is hereby granted, free of charge, to any person obtaining a
7 copy of this software and associated documentation files (the "Software"),
8 to deal in the Software without restriction, including without limitation
9 the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 and/or sell copies of the Software, and to permit persons to whom the
11 Software is furnished to do so, subject to the following conditions:
12
13 The above copyright notice and this permission notice shall be included in
14 all copies or substantial portions of the Software.
15
16 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 DEALINGS IN THE SOFTWARE.
23 */
24/**
25 * @file ScheduleEstimator.cc
26 *
27 * Definition of ScheduleEstimator class.
28 *
29 * This class tries to estimate the worst possible cycle count
30 * for a basic block.
31 *
32 * @author Heikki Kultala 2019 (hkultala-no.spam-tuni.fi)
33 * @note rating: red
34 */
35
36#include "ScheduleEstimator.hh"
37#include "BasicBlock.hh"
39#include "Instruction.hh"
40#include "Move.hh"
41#include "Terminal.hh"
42#include "Machine.hh"
43#include "ControlUnit.hh"
44#include "MachineInfo.hh"
45#include "Operation.hh"
46#include "ControlFlowGraph.hh"
47
48int
51
52 auto tempRegFiles = MachineConnectivityCheck::tempRegisterFiles(mach);
53 int tempRegCount = tempRegFiles.size();
54
55 int size = 0;
56 int iCount = bb.instructionCount();
57
58 for (int i = 0; i < iCount; i++) {
59 auto& ins = bb[i];
60 for (int j = 0; j < ins.moveCount(); j++) {
61 size++;
62 // temp reg copies may make schedule longer.
63 size += tempRegCount;
64 auto& m = ins.move(j);
65 auto& src = m.source();
66
67 if (m.isControlFlowMove()) {
68 size += mach.controlUnit()->delaySlots() + 1;
69 }
70 if (src.isFUPort() && !src.isRA()) {
71 const Operation& o = src.hintOperation();
72 TCEString opName = o.name();
73 int lat = MachineInfo::maxLatency(mach,opName);
74 if (lat > 0) {
75 size += lat-1;
76 }
77 }
78 }
79 }
80 return size;
81}
82
83
84void
86 ControlFlowGraph& cfg, const TTAMachine::Machine& mach) {
87
88 for (int bbIndex = 0; bbIndex < cfg.nodeCount(); ++bbIndex) {
89 BasicBlockNode& bbn = cfg.node(bbIndex);
90 if (!bbn.isNormalBB()) {
91 bbn.setMaximumSize(0);
92 } else {
93 auto& bb = bbn.basicBlock();
95 bbn.isScheduled() ?
96 bb.instructionCount() - bb.skippedFirstInstructions() :
97 maximumSizeOfBB(bb, mach));
98 }
99 }
100}
TTAProgram::BasicBlock & basicBlock()
bool isNormalBB() const
void setMaximumSize(int sz)
bool isScheduled() const
int nodeCount() const
Node & node(const int index) const
static std::set< const TTAMachine::RegisterFile *, TTAMachine::MachinePart::Comparator > tempRegisterFiles(const TTAMachine::Machine &machine)
static int maxLatency(const TTAMachine::Machine &mach, TCEString &opName)
virtual TCEString name() const
Definition Operation.cc:93
static int maximumSizeOfBB(TTAProgram::BasicBlock &bb, const TTAMachine::Machine &mach)
virtual void handleControlFlowGraph(ControlFlowGraph &cfg, const TTAMachine::Machine &mach) override
virtual ControlUnit * controlUnit() const
Definition Machine.cc:345
virtual int instructionCount() const