33#ifndef TCE_TARGET_MACHINE_H
34#define TCE_TARGET_MACHINE_H
38#include "tce_config.h"
43#include "llvm/CodeGen/TargetLowering.h"
44#include "llvm/CodeGen/TargetFrameLowering.h"
45#include "llvm/Analysis/TargetTransformInfo.h"
46#include "llvm/Target/TargetMachine.h"
47#include "llvm/CodeGen/SelectionDAGTargetInfo.h"
49#include "llvm/IR/PassManager.h"
61#include "llvm/CodeGen/Passes.h"
62#include "llvm/IR/DataLayout.h"
64#include "llvm/CodeGen/TargetPassConfig.h"
72class PipelineableLoopFinder;
84 LLVMTargetMachine* tm,
87 TargetPassConfig(*tm, pm),
110 const Target &T,
const Triple& TTriple,
111 const llvm::StringRef& CPU,
const llvm::StringRef& FS,
113 #ifdef LLVM_OLDER_THAN_16
114 Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
116 std::optional<Reloc::Model> RM, std::optional<CodeModel::Model> CM,
118 CodeGenOpt::Level OL,
bool isLittle);
178 PassManagerBase &PM)
override;
180 #ifdef LLVM_OLDER_THAN_15
208 std::string
rfName(
unsigned dwarfRegNum)
const {
221 return rfName(dwarfRegNum) +
"."
283 std::cerr <<
"ZERO STACK ALIGN\n";
329 int getLoadOpcode(
int asid,
int align,
const llvm::EVT& vt)
const;
337 std::set<std::pair<unsigned, llvm::MVT::SimpleValueType> >
missingOps_;
338 std::set<std::pair<unsigned, llvm::MVT::SimpleValueType> >
promotedOps_;
#define assert(condition)
#define IGNORE_COMPILER_WARNING(X)
#define POP_COMPILER_DIAGS
void LLVMInitializeTCETarget()
const TTAMachine::Machine * ttaMach_
virtual void setTTAMach(const TTAMachine::Machine *mach)
TCEPassConfig(LLVMTargetMachine *tm, PassManagerBase &pm, TCETargetMachinePlugin *plugin)
TCETargetMachinePlugin * plugin_
virtual void addPreSched2()
virtual bool addInstSelector()
virtual bool addPreISel()
virtual void addPreRegAlloc()
virtual int getMinuOpcode(llvm::SDNode *n) const =0
virtual bool validStackAccessOperation(const std::string &opName) const =0
Returns true if OSAL operation is valid for stack accesses.
virtual const TargetFrameLowering * getFrameLowering() const =0
virtual TargetLowering * getTargetLowering() const =0
virtual int getMaxOpcode(llvm::SDNode *n) const =0
virtual bool is64bit() const =0
virtual bool has16bitLoads() const =0
virtual const TargetRegisterInfo * getRegisterInfo() const =0
virtual std::string dataASName()=0
Returns name of the data address space.
virtual const TargetInstrInfo * getInstrInfo() const =0
virtual unsigned opcode(TCEString operationName) const =0
Returns the opcode for the given osal operation, undefined if not found.
virtual bool canMaterializeConstant(const ConstantInt &ci) const =0
virtual std::string operationName(unsigned opc) const =0
Returns operation name corresponding to llvm target opcode.
virtual int getAddOpcode(const llvm::EVT &vt) const =0
virtual std::string rfName(unsigned dwarfRegNum)=0
Returns name of the physical register file corresponding to a generated register ID.
virtual int getShlOpcode(const llvm::EVT &vt) const =0
virtual const TargetSubtargetInfo * getSubtarget() const =0
virtual const DataLayout * getDataLayout() const
virtual int getMinOpcode(llvm::SDNode *n) const =0
virtual unsigned registerIndex(unsigned dwarfRegNum)=0
Returns name of the physical register index corresponding to a generated register ID.
virtual bool hasOperation(TCEString operationName) const =0
Returns true in case the target supports the given osal operation.
virtual bool has8bitLoads() const =0
virtual TargetTransformInfo getTargetTransformInfo(const Function &F) const =0
virtual unsigned raPortDRegNum()=0
Returns ID number of the return address register.
virtual unsigned llvmRegisterId(const TCEString &ttaRegister)=0
virtual unsigned spDRegNum()=0
Returns ID number of the stack pointer register.
virtual int getIorOpcode(const llvm::EVT &vt) const =0
virtual int getMaxuOpcode(llvm::SDNode *n) const =0
virtual const TCESubtarget * getSubtargetImpl() const
bool canMaterializeConstant(const ConstantInt &ci) const
const std::set< std::pair< unsigned, llvm::MVT::SimpleValueType > > * customLegalizedOperations()
std::string operationName(unsigned opc) const
TargetTransformInfo getTargetTransformInfo(const Function &F) const override
virtual const TargetFrameLowering * getFrameLowering() const
virtual TargetLowering * getTargetLowering() const
virtual const DataLayout * getDataLayout() const
int getAddOpcode(const llvm::EVT &vt) const
virtual const TTAMachine::Machine & ttaMachine() const
virtual TCETargetMachinePlugin & targetPlugin() const
const std::set< std::pair< unsigned, llvm::MVT::SimpleValueType > > * missingOperations()
Module * emulationModule_
virtual void setEmulationModule(Module *mod)
unsigned raPortDRegNum() const
unsigned spDRegNum() const
bool validStackAccessOperation(const std::string &opName) const
int getMaxOpcode(llvm::SDNode *n)
void setStackAlignment(unsigned align)
virtual void setTTAMach(const TTAMachine::Machine *mach) override
virtual TargetPassConfig * createPassConfig(PassManagerBase &PM) override
TTAMachine::Machine * createMachine()
int getMinuOpcode(llvm::SDNode *n)
int getIorOpcode(const llvm::EVT &vt) const
virtual const TargetSubtargetInfo * getSubtargetImpl(const Function &) const override
bool canEncodeAsMOVI(const llvm::MVT &vt, int64_t val) const
int getLoadOpcode(int asid, int align, const llvm::EVT &vt) const
int getMinOpcode(llvm::SDNode *n)
bool has16bitLoads() const
virtual const TargetRegisterInfo * getRegisterInfo() const
int64_t smallestImmValue() const
unsigned llvmRegisterId(const TCEString &ttaRegister)
virtual ~TCETargetMachine()
std::set< std::pair< unsigned, llvm::MVT::SimpleValueType > > promotedOps_
std::string registerName(unsigned dwarfRegNum) const
std::string rfName(unsigned dwarfRegNum) const
int getShlOpcode(const llvm::EVT &vt) const
int getMaxuOpcode(llvm::SDNode *n)
void calculateSupportedImmediates()
bool has8bitLoads() const
bool canEncodeAsMOVF(const llvm::APFloat &fp) const
bool hasOperation(TCEString operationName) const
virtual void setTargetMachinePlugin(TCETargetMachinePlugin &plugin, TTAMachine::Machine &target)
unsigned opcode(TCEString operationName) const
PluginTools * pluginTool_
std::set< std::pair< unsigned, llvm::MVT::SimpleValueType > > customLegalizedOps_
TCETargetMachinePlugin * plugin_
std::set< std::pair< unsigned, llvm::MVT::SimpleValueType > > missingOps_
llvm::ISD opcode list of operations that have to be expanded.
unsigned registerIndex(unsigned dwarfRegNum) const
const std::set< std::pair< unsigned, llvm::MVT::SimpleValueType > > * promotedOperations()
unsigned stackAlignment() const
uint64_t largestImmValue() const
virtual const TargetInstrInfo * getInstrInfo() const