OpenASIP 2.2
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TestbenchGenerator.hh
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1/*
2 Copyright (c) 2002-2010 Tampere University.
3
4 This file is part of TTA-Based Codesign Environment (TCE).
5
6 Permission is hereby granted, free of charge, to any person obtaining a
7 copy of this software and associated documentation files (the "Software"),
8 to deal in the Software without restriction, including without limitation
9 the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 and/or sell copies of the Software, and to permit persons to whom the
11 Software is furnished to do so, subject to the following conditions:
12
13 The above copyright notice and this permission notice shall be included in
14 all copies or substantial portions of the Software.
15
16 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 DEALINGS IN THE SOFTWARE.
23 */
24/**
25 * @file TestbenchGenerator.hh
26 *
27 * Declaration of TestbenchGenerator class
28 *
29 * @author Otto Esko 2010 (otto.esko-no.spam-tut.fi)
30 * @note rating: red
31 */
32
33#ifndef TTA_TESTBENCH_GENERATOR_HH
34#define TTA_TESTBENCH_GENERATOR_HH
35
36#include <string>
37#include <sstream>
38#include <fstream>
39#include <vector>
40#include <map>
41#include <stdint.h>
42
43namespace HDB {
44 class HWBlockImplementation;
45}
46
48public:
50
51 virtual ~TestbenchGenerator();
52
53 virtual void generateTestbench(std::ofstream& file) = 0;
54
55protected:
56 typedef std::map<std::string, std::vector<uint32_t> > PortDataArray;
57
58 virtual void writeStimulusArray(
59 std::ostringstream& stream,
60 std::vector<uint32_t>& dataArray,
61 std::string portName,
62 int portWidth);
63
64 void writeTbConstants(int totalCycles, int outputIgnoreCycles);
65
66 void writeTestbench(
67 std::ofstream& file, HDB::HWBlockImplementation* impl);
68
69 std::ostringstream& declarationStream();
70 std::ostringstream& bindingStream();
71 std::ostringstream& signalStream();
72 std::ostringstream& instantiationStream();
73 std::ostringstream& inputArrayStream();
74 std::ostringstream& opcodeArrayStream();
75 std::ostringstream& loadArrayStream();
76 std::ostringstream& outputArrayStream();
77 std::ostringstream& tbCodeStream();
78
79private:
80 std::string findVhdlTemplate() const;
81
83 const std::string& fileName, std::string& vhdlTemplate) const;
84
85 std::ostringstream componentDeclaration_;
86 std::ostringstream componentBinding_;
87 std::ostringstream signalDeclaration_;
88 std::ostringstream componentInstantiation_;
89 std::ostringstream inputArrays_;
90 std::ostringstream opcodeArrays_;
91 std::ostringstream loadSignalArrays_;
92 std::ostringstream outputArrays_;
93 std::ostringstream testbenchCode_;
94
95 static const std::string TB_TEMPLATE_;
96};
97
98#endif
std::ostringstream testbenchCode_
std::ostringstream & opcodeArrayStream()
std::ostringstream opcodeArrays_
void loadVhdlTemplate(const std::string &fileName, std::string &vhdlTemplate) const
std::map< std::string, std::vector< uint32_t > > PortDataArray
std::ostringstream & inputArrayStream()
void writeTbConstants(int totalCycles, int outputIgnoreCycles)
std::string findVhdlTemplate() const
std::ostringstream signalDeclaration_
std::ostringstream & tbCodeStream()
std::ostringstream outputArrays_
std::ostringstream loadSignalArrays_
static const std::string TB_TEMPLATE_
std::ostringstream & outputArrayStream()
std::ostringstream & instantiationStream()
virtual void generateTestbench(std::ofstream &file)=0
std::ostringstream componentInstantiation_
std::ostringstream & loadArrayStream()
std::ostringstream componentBinding_
std::ostringstream inputArrays_
std::ostringstream & bindingStream()
std::ostringstream & declarationStream()
std::ostringstream & signalStream()
std::ostringstream componentDeclaration_
void writeTestbench(std::ofstream &file, HDB::HWBlockImplementation *impl)
virtual void writeStimulusArray(std::ostringstream &stream, std::vector< uint32_t > &dataArray, std::string portName, int portWidth)