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OpenASIP 2.2
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This is the complete list of members for RISCVTDGen, including all inherited members.
| addOperations_ | TDGen | protected |
| addressingModeDefs_ | TDGen | protected |
| ALL_REGISTERS enum value | TDGen | protected |
| allOpNames_ | TDGen | protected |
| analyzeMachineRegisters() | TDGen | protected |
| analyzeMachineVectorRegisterClasses() | TDGen | protected |
| analyzeRegisterFileClasses() | TDGen | protected |
| analyzeRegisters() | TDGen | protected |
| analyzeRegisters(RegsToProcess regsToProcess) | TDGen | protected |
| andSameOperations_ | TDGen | protected |
| areImmediateOperandsLegal(const Operation &operation, const std::string &operandTypes) const | TDGen | protected |
| argRegCount_ | TDGen | protected |
| argRegNames_ | TDGen | protected |
| argRegsArray_ | TDGen | protected |
| ARGUMENT enum value | TDGen | protected |
| associatedVectorRegisterClass(const Operand &operand) const | TDGen | protected |
| associateRegistersWithVectorRegisterClasses() | TDGen | protected |
| backendCode_ | TDGen | protected |
| baseClasses_ | TDGen | protected |
| bem_ | RISCVTDGen | protected |
| BOOL_SUBW_WIDTH | TDGen | protectedstatic |
| callingConv_ | TDGen | protected |
| canBeImmediate(const OperationDAG &dag, const TerminalNode &node) | TDGen | protected |
| canBePredicated(Operation &op, const std::string &operandTypes) | TDGen | protected |
| checkRequiredRegisters() | TDGen | protected |
| constantMaterializationPredicates_ | TDGen | protected |
| constantNodeString(const Operation &op, const OperationDAG &dag, const ConstantNode &node, const std::string &operandTypes, const OperationDAGNode *successor=nullptr) | TDGen | protected |
| create32BitExtLoadPatterns(std::ostream &os) | TDGen | protected |
| createBoolAndHalfLoadPatterns(std::ostream &os) | TDGen | protected |
| createBranchAnalysis(std::ostream &os) | TDGen | protected |
| createByteExtLoadPatterns(std::ostream &os) | TDGen | protected |
| createConstantMaterializationPatterns(std::ostream &os) | TDGen | protectedvirtual |
| createConstantMaterializationQuery(std::ostream &os) | TDGen | protected |
| createConstShiftPatterns(std::ostream &os) | TDGen | protected |
| createDefaultOperandTypeString(const Operation &op) | TDGen | protected |
| createEndiannesQuery(std::ostream &os) | TDGen | protected |
| createGetMaxMemoryAlignment(std::ostream &os) const | TDGen | protected |
| createMinMaxDef(const TCEString &opName, const TCEString &valueName, std::ostream &os) | TDGen | protected |
| createMinMaxGenerator(std::ostream &os) | TDGen | protectedvirtual |
| createParamDRegNums(std::ostream &os) | TDGen | protected |
| createSelectPatterns(std::ostream &os) | TDGen | protectedvirtual |
| createShortExtLoadPatterns(std::ostream &os) | TDGen | protected |
| createTrivialDAG(Operation &op) | TDGen | protected |
| createVectorMinMaxDef(const TCEString &opName, int bits, char llvmTypeChar, const TCEString &postFix, std::ostream &os) | TDGen | protected |
| createVectorRVDRegNums(std::ostream &os) | TDGen | protectedvirtual |
| customOps_ | RISCVTDGen | protected |
| dagNodeToString(const Operation &op, const OperationDAG &dag, const OperationDAGNode &node, bool emulationPattern, const std::string &operandTypes, const Operation *emulatingOp=nullptr, const OperationDAGNode *successor=nullptr) | TDGen | protected |
| decimalsToHex(const std::string &pattern) const | RISCVTDGen | protected |
| declarationStr_ | RISCVTDGen | protected |
| dregNum_ | TDGen | protected |
| dumpClassDefinitions(std::ostream &) const | RISCVTDGen | protected |
| emulatingOpNodeLLVMName(const Operation &op, const OperationDAG &dag, const OperationNode &node, const std::string &operandTypes) | TDGen | protected |
| EXPLOIT_BIGGER_REGISTERS | TDGen | protectedstatic |
| extractElemOperations_ | TDGen | protected |
| falsePredOps_ | TDGen | protected |
| findCustomOps() | RISCVTDGen | protected |
| findFormat(const std::string name) const | RISCVTDGen | protected |
| FP_SUBW_WIDTH | TDGen | protectedstatic |
| gatherAllMachineOperations() | TDGen | protected |
| gatherOperations_ | TDGen | protected |
| generateBackend(const std::string &path) const | RISCVTDGen | virtual |
| generateBackend() const | RISCVTDGen | virtual |
| generateLoadStoreCopyGenerator(std::ostream &os) | TDGen | protected |
| genGeneratedTCEPlugin_getAddOpcode(std::ostream &o) const | TDGen | protected |
| genGeneratedTCEPlugin_getConstantVectorShuffleOpcode(std::ostream &o) const | TDGen | protected |
| genGeneratedTCEPlugin_getExtractElemOpcode(std::ostream &o) const | TDGen | protected |
| genGeneratedTCEPlugin_getGatherOpcode(std::ostream &o) const | TDGen | protected |
| genGeneratedTCEPlugin_getIorOpcode(std::ostream &o) const | TDGen | protected |
| genGeneratedTCEPlugin_getLoad(std::ostream &o) const | TDGen | protected |
| genGeneratedTCEPlugin_getLoadOpcode(std::ostream &o) const | TDGen | protected |
| genGeneratedTCEPlugin_getShlOpcode(std::ostream &o) const | TDGen | protected |
| genGeneratedTCEPlugin_getStore(std::ostream &o) const | TDGen | protected |
| genGeneratedTCEPlugin_getVectorAndSameOpcode(std::ostream &o) const | TDGen | protected |
| genGeneratedTCEPlugin_getVectorBroadcastOpcode(std::ostream &o) const | TDGen | protected |
| genGeneratedTCEPlugin_getVectorImmediateOpcode(std::ostream &o) const | TDGen | protected |
| genGeneratedTCEPlugin_getVectorIorSameOpcode(std::ostream &o) const | TDGen | protected |
| genGeneratedTCEPlugin_getVectorPackOpcode(std::ostream &o) const | TDGen | protected |
| genGeneratedTCEPlugin_getVectorSelectOpcode(std::ostream &o) const | TDGen | protected |
| genGeneratedTCEPlugin_getVectorShlSameOpcode(std::ostream &o) const | TDGen | protected |
| genGeneratedTCEPlugin_getVectorShrSameOpcode(std::ostream &o) const | TDGen | protected |
| genGeneratedTCEPlugin_getVectorShruSameOpcode(std::ostream &o) const | TDGen | protected |
| genGeneratedTCEPlugin_getVectorShuffle1Opcode(std::ostream &o) const | TDGen | protected |
| genGeneratedTCEPlugin_getVectorShuffle2Opcode(std::ostream &o) const | TDGen | protected |
| genGeneratedTCEPlugin_getVectorValueType(std::ostream &o) const | TDGen | protected |
| genGeneratedTCEPlugin_getVectorXorSameOpcode(std::ostream &o) const | TDGen | protected |
| genGeneratedTCEPlugin_isVectorRegisterMove(std::ostream &o) const | TDGen | protected |
| genTCEInstrInfo_copyPhys64bitReg(std::ostream &o) const | TDGen | protected |
| genTCEInstrInfoSIMD_copyPhysVectorReg(std::ostream &o) const | TDGen | protected |
| genTCERegisterInfo_setReservedVectorRegs(std::ostream &os) const | TDGen | protected |
| genTCETargetLoweringSIMD_addVectorRegisterClasses(std::ostream &o) const | TDGen | protected |
| genTCETargetLoweringSIMD_associatedVectorRegClass(std::ostream &o) const | TDGen | protected |
| genTCETargetLoweringSIMD_getSetCCResultVT(std::ostream &o) const | TDGen | protected |
| getFormatType(const std::string &opName) const | RISCVTDGen | protected |
| getLLVMPatternWithConstants(const Operation &op, const std::string &operandTypes, const std::string &operand0, const std::string &operand1) const | TDGen | protected |
| getMatchableOperationDAG(const Operation &op) | TDGen | protected |
| getMatchableOperationDAGs(const Operation &op) | TDGen | protected |
| getMovePattern(const char &opdType, const std::string &inputPattern) const | TDGen | protected |
| GPR enum value | TDGen | protected |
| gprRegNames_ | TDGen | protected |
| guardedRegs_ | TDGen | protected |
| guardRegTemplateName | TDGen | protectedstatic |
| hasConditionalMoves_ | TDGen | protected |
| hasExBoolRegs_ | TDGen | protected |
| hasExIntRegs_ | TDGen | protected |
| hasRawOperands(const Operation &op) const | TDGen | protected |
| hasRegisterClassSupport(const Operation &op) const | TDGen | protected |
| hasRegisterClassSupport(const TDGenerator::ValueType &vt) const | TDGen | protected |
| hasSelect_ | TDGen | protected |
| HFP_SUBW_WIDTH | TDGen | protectedstatic |
| highestLaneBool_ | TDGen | protected |
| highestLaneInt_ | TDGen | protected |
| immediateLoads_ | TDGen | protected |
| immediateOperandNameForEmulatedOperation(const OperationDAG &, const Operand &operand) | TDGen | protected |
| immediatePredicate(int64_t lowerBoundInclusive, uint64_t upperBoundInclusive) | TDGen | protected |
| immediateStores_ | TDGen | protected |
| immInfo_ | TDGen | protected |
| immOperandDefs_ | TDGen | protected |
| initializeBackendContents() | RISCVTDGen | protectedvirtual |
| instrFormats_ | TDGen | protected |
| instrInfo_ | TDGen | protected |
| iorOperations_ | TDGen | protected |
| iorSameOperations_ | TDGen | protected |
| isVectorBitwiseOperation(const Operation &op) const | TDGen | protected |
| isVectorLoadOperation(const Operation &op) const | TDGen | protected |
| isVectorStoreOperation(const Operation &op) const | TDGen | protected |
| isWrongEndianessVectorOp(const Operation &op) const | TDGen | protected |
| littleEndian_ | TDGen | protected |
| llvmGuardRegs_ | TDGen | protected |
| llvmOperationName(const TCEString &opName) const | TDGen | protectedvirtual |
| llvmOperationPattern(const Operation &op, char operandType=' ') const | TDGen | protectedvirtual |
| mach_ | TDGen | protected |
| MAX_SCALAR_WIDTH | TDGen | protectedstatic |
| MAX_SUBW_COUNT | TDGen | protectedstatic |
| maxScalarWidth_ | TDGen | protected |
| maxVectorSize_ | TDGen | protected |
| movOperations_ | TDGen | protected |
| ONLY_EXTRAS enum value | TDGen | protected |
| ONLY_LANES enum value | TDGen | protected |
| ONLY_NORMAL enum value | TDGen | protected |
| operandChar(Operand &operand) | TDGen | protectedvirtual |
| operandDefs_ | TDGen | protected |
| operandToString(const Operand &operand, bool match, char operandType, const std::string &immDefName="") | TDGen | protectedvirtual |
| operandTypesToRegisters(const std::string &opdTypes) const | TDGen | protected |
| operandTypeToRegister(const char &opdType) const | TDGen | protected |
| OPERATION_PATTERNS_ | TDGen | protectedstatic |
| operationCanBeMatched(const Operation &op, std::set< std::string > *recursionCycleCheck=NULL, bool recursionHasStore=false) | TDGen | protected |
| operationDAGCanBeMatched(const OperationDAG &op, std::set< std::string > *recursionCycleCheck=NULL, bool recursionHasStore=false) | TDGen | protected |
| operationNodeToString(const Operation &op, const OperationDAG &dag, const OperationNode &node, bool emulationPattern, const std::string &operandTypes) | TDGen | protected |
| operationPattern(const Operation &op, const OperationDAG &dag, const std::string &operandTypes) | TDGen | protected |
| opNames_ | TDGen | protected |
| orderEqualWidthRegistersToRoundRobin() | TDGen | protected |
| OT_IMM_BOOL | TDGen | static |
| OT_IMM_FP | TDGen | static |
| OT_IMM_HFP | TDGen | static |
| OT_IMM_INT | TDGen | static |
| OT_IMM_LONG | TDGen | static |
| OT_REG_BOOL | TDGen | static |
| OT_REG_DOUBLE | TDGen | static |
| OT_REG_FP | TDGen | static |
| OT_REG_HFP | TDGen | static |
| OT_REG_INT | TDGen | static |
| OT_REG_LONG | TDGen | static |
| OT_VREG_BOOL | TDGen | static |
| OT_VREG_FP | TDGen | static |
| OT_VREG_HFP | TDGen | static |
| OT_VREG_INT16 | TDGen | static |
| OT_VREG_INT32 | TDGen | static |
| OT_VREG_INT8 | TDGen | static |
| packOperations_ | TDGen | protected |
| patInputs(const Operation &op, const std::string &oprTypes) | TDGen | protected |
| patOutputs(const Operation &op, const std::string &oprTypes) | TDGen | protected |
| patternStr_ | RISCVTDGen | protected |
| prebypassStackIndeces_ | TDGen | protected |
| RegClassMap typedef | TDGen | protected |
| registerInfo_ | TDGen | protected |
| registerLoads_ | TDGen | protected |
| registers_ | TDGen | protected |
| registerStores_ | TDGen | protected |
| regs16bit_ | TDGen | protected |
| regs1bit_ | TDGen | protected |
| regs32bit_ | TDGen | protected |
| regs64bit_ | TDGen | protected |
| regs8bit_ | TDGen | protected |
| regs_ | TDGen | protected |
| regsInClasses_ | TDGen | protected |
| regsInRFClasses_ | TDGen | protected |
| RegsToProcess enum name | TDGen | protected |
| RegType enum name | TDGen | protected |
| requiredI32Regs_ | TDGen | protected |
| requiredI64Regs_ | TDGen | protected |
| RESERVED enum value | TDGen | protected |
| resRegNames_ | TDGen | protected |
| RESULT enum value | TDGen | protected |
| RISCVTDGen(const TTAMachine::Machine &mach) | RISCVTDGen | |
| saveAdditionalVectorOperationInfo(const Operation &op, const TCEString &valueTypes, bool isRegisterOp) | TDGen | protected |
| scalarOps_ | TDGen | protected |
| shlOperations_ | TDGen | protected |
| shlSameOperations_ | TDGen | protected |
| shrSameOperations_ | TDGen | protected |
| shruSameOperations_ | TDGen | protected |
| subPattern(const Operation &op, const OperationDAG &dag) | TDGen | protected |
| subwordWidthOfRawData(const Operation &op) const | TDGen | protected |
| supportedStackAccessOperations(const TTAMachine::Machine &mach) | TDGen | protectedstatic |
| tceOperationPattern(const Operation &op) | TDGen | protected |
| TDGen(const TTAMachine::Machine &mach, bool initialize=true) | TDGen | |
| tempRegFiles_ | TDGen | protected |
| topLevelTD_ | TDGen | protected |
| transformTCEPattern(std::string pattern, const unsigned numIns) const | RISCVTDGen | protected |
| truePredOps_ | TDGen | protected |
| truncOperations_ | TDGen | protected |
| use64bitForFP_ | TDGen | protected |
| vbcastOperations_ | TDGen | protected |
| vcshuffleOperations_ | TDGen | protected |
| vectorOps_ | TDGen | protected |
| verbose(const TCEString &msg) const | TDGen | protected |
| vRegClasses_ | TDGen | protected |
| vselectOperations_ | TDGen | protected |
| vshuffle1Operations_ | TDGen | protected |
| vshuffle2Operations_ | TDGen | protected |
| write16bitRegisterInfo(std::ostream &o) | TDGen | protected |
| write1bitRegisterInfo(std::ostream &o) | TDGen | protected |
| write32bitRegisterInfo(std::ostream &o) | TDGen | protected |
| write64bitMoveDefs(std::ostream &o) | TDGen | protected |
| write64bitRegisterInfo(std::ostream &o) | TDGen | protected |
| write8bitRegisterInfo(std::ostream &o) | TDGen | protected |
| writeAddressingModeDefs(std::ostream &o) | TDGen | protected |
| writeArgRegsArray(std::ostream &os) | TDGen | protected |
| writeBackendCode(std::ostream &o) | TDGen | protected |
| writeBooleanStorePatterns(std::ostream &os) | TDGen | protected |
| writeBroadcastDefs(std::ostream &o, Operation &op, int vectorLen) | TDGen | protected |
| writeCallDef(std::ostream &o) | TDGen | protected |
| writeCallDefRegs(std::ostream &o) | TDGen | protectedvirtual |
| writeCallingConv(std::ostream &os) | TDGen | protected |
| writeCallingConvLicenceText(std::ostream &os) | TDGen | protected |
| writeCallSeqStart(std::ostream &os) | TDGen | protected |
| writeCondBranchDefs(std::ostream &os) | TDGen | protected |
| writeConstShiftPat(std::ostream &os, const TCEString &nodeName, const TCEString &opNameBase, int i) | TDGen | protected |
| writeControlFlowInstrDefs(std::ostream &os) | TDGen | protected |
| writeEmulationPattern(std::ostream &o, const Operation &op, const OperationDAG &dag) | TDGen | protected |
| writeGetPointerAdjustmentQuery(std::ostream &os) const | TDGen | protected |
| writeGuardRegisterClassInfo(std::ostream &o) | TDGen | protected |
| writeHWLoopDef(std::ostream &o) | TDGen | protected |
| writeImmediateDef(std::ostream &o, const std::string &defName, const std::string &operandType, const std::string &predicate) | TDGen | protectedvirtual |
| writeInstrDef(std::ostream &o, const std::string &instrDefName, const std::string &outs, const std::string &ins, const std::string &asmString, const std::string &pattern) | TDGen | protected |
| writeInstrFormats(std::ostream &o) | TDGen | protected |
| writeInstrInfo(std::ostream &o) | TDGen | protected |
| writeInstructionDeclaration(std::ostream &o, const std::string &name, const int encoding) const | RISCVTDGen | protected |
| writeInstructionDeclarations(std::ostream &o) const | RISCVTDGen | protected |
| writeIntegerImmediateDefs(std::ostream &o, const ImmInfo &iivis) | TDGen | protected |
| writeMiscPatterns(std::ostream &o) | TDGen | protected |
| writeMoveImmediateDefs(std::ostream &o) | TDGen | protected |
| writeOperandDefs(std::ostream &o) | TDGen | protected |
| writeOperationDef(std::ostream &o, Operation &op, const std::string &operandTypes, const std::string &attrs, bool skipPattern, std::string backendPrefix="") | TDGen | protected |
| writeOperationDefs(std::ostream &o, Operation &op, bool skipPattern) | TDGen | protected |
| writeOperationDefs(std::ostream &o, Operation &op, const std::string &operandTypes, const std::string &attrs, bool skipPattern, std::string backendPrefix="") | TDGen | protected |
| writeOperationDefUsingGivenOperandTypes(std::ostream &o, Operation &op, bool skipPattern, std::vector< TDGenerator::ValueType > inputs, std::vector< TDGenerator::ValueType > outputs, TCEString instrSuffix="") | TDGen | protected |
| writePatternDefinition(std::ostream &o, Operation &op) | RISCVTDGen | protected |
| writePatternDefinitions(std::ostream &o) | RISCVTDGen | protected |
| writePatternReplacement(std::ostream &o, const TCEString &origPat, const TCEString &replacerPat) const | TDGen | protected |
| writePortGuardedJumpDefPair(std::ostream &os, const TCEString &tceop1, const TCEString &tceop2, bool fp=false) | TDGen | protected |
| writeRARegisterInfo(std::ostream &o) | TDGen | protected |
| writeRegisterClasses(std::ostream &o) | TDGen | protected |
| writeRegisterDef(std::ostream &o, const RegInfo ®, const std::string regName, const std::string regTemplate, const std::string aliases, RegType type) | TDGen | protected |
| writeRegisterInfo(std::ostream &o) | TDGen | protected |
| writeScalarOperationExploitations(std::ostream &o) | TDGen | protected |
| writeScalarToVectorDefs(std::ostream &o) const | TDGen | protected |
| writeStartOfRegisterInfo(std::ostream &o) | TDGen | protected |
| writeTopLevelTD(std::ostream &o) | TDGen | protected |
| writeVectorAnyextPattern(std::ostream &o, Operation &op, const TCEString &loadPatternName, int vectorLen) | TDGen | protected |
| writeVectorBitConversions(std::ostream &o) const | TDGen | protected |
| writeVectorBitwiseOperationDefs(std::ostream &o, Operation &op, bool skipPattern) | TDGen | protected |
| writeVectorImmediateWriteDefs(std::ostream &instrInfoTD) | TDGen | protected |
| writeVectorLoadDefs(std::ostream &o, const TCEString &opName, const TCEString &opNameSuffix, bool addrImm, const TCEString &resultType, const TCEString &loadPatternName, bool writePredicatedVersions) | TDGen | protected |
| writeVectorLoadDefs(std::ostream &o, Operation &op, const TCEString &loadPatternName, int vectorLen) | TDGen | protected |
| writeVectorLoadStoreOperationExploitations(std::ostream &o) | TDGen | protected |
| writeVectorMemoryOperationDefs(std::ostream &o, Operation &op, bool skipPattern) | TDGen | protected |
| writeVectorOperationDef(std::ostream &o, Operation &op, TCEString valueTypes, const TCEString &attributes, bool skipPattern) | TDGen | protected |
| writeVectorOperationDefs(std::ostream &o, Operation &op, bool skipPattern) | TDGen | protected |
| writeVectorRegisterBaseClasses(std::ostream &o) const | TDGen | protected |
| writeVectorRegisterClasses(std::ostream &o) const | TDGen | protected |
| writeVectorRegisterMoveDefs(std::ostream &o) | TDGen | protected |
| writeVectorRegisterNames(std::ostream &o) | TDGen | protected |
| writeVectorStoreDefs(std::ostream &o, const TCEString &opName, const TCEString &opNameSuffix, bool addrImm, const TCEString &dataType, bool writePredicatedVersions) | TDGen | protected |
| writeVectorStoreDefs(std::ostream &o, Operation &op, int vectorLen) | TDGen | protected |
| writeVectorTruncStoreDefs(std::ostream &o) const | TDGen | protected |
| writeVectorTruncStoreDefs(std::ostream &o, Operation &op, int bitsize, int vectorLen) | TDGen | protected |
| writeWiderVectorOperationExploitations(std::ostream &o) | TDGen | protected |
| xorSameOperations_ | TDGen | protected |
| ~RISCVTDGen()=default | RISCVTDGen | virtual |
| ~TDGen() | TDGen | virtual |
1.9.8