| addProGeFiles() const | PlatformIntegrator | protected |
| addSignalMapping(const TCEString &signal) | Stratix3DevKitIntegrator | private |
| AlteraIntegrator() | AlteraIntegrator | |
| AlteraIntegrator(const TTAMachine::Machine *machine, const IDF::MachineImplementation *idf, ProGe::HDL hdl, TCEString progeOutputDir, TCEString entityName, TCEString outputDir, TCEString programName, int targetClockFreq, std::ostream &warningStream, std::ostream &errorStream, const MemInfo &imem, MemType dmemType) | AlteraIntegrator | |
| chopSignalToTag(const TCEString &original, const TCEString &tag) const | PlatformIntegrator | protected |
| chopTaggedSignals() const | Stratix3DevKitIntegrator | protectedvirtual |
| clearDataMemories() | PlatformIntegrator | protected |
| clkPort_ | PlatformIntegrator | private |
| clockPort() const | PlatformIntegrator | |
| connectToplevelPort(const ProGe::NetlistPort &corePort, const TCEString signalPrefix="") | PlatformIntegrator | protectedvirtual |
| copyProgeBlockToNetlist(const ProGe::NetlistBlock *progeBlock) | PlatformIntegrator | protected |
| coreEntityName() const | PlatformIntegrator | |
| coreEntityName_ | PlatformIntegrator | private |
| createMemories(int coreId) | PlatformIntegrator | protectedvirtual |
| createOutputDir() | PlatformIntegrator | private |
| DEFAULT_FREQ_ | Stratix3DevKitIntegrator | privatestatic |
| DEVICE_FAMILY_ | Stratix3DevKitIntegrator | privatestatic |
| DEVICE_NAME_ | Stratix3DevKitIntegrator | privatestatic |
| DEVICE_PACKAGE_ | Stratix3DevKitIntegrator | privatestatic |
| DEVICE_SPEED_CLASS_ | Stratix3DevKitIntegrator | privatestatic |
| deviceFamily() const | Stratix3DevKitIntegrator | virtual |
| deviceName() const | PlatformIntegrator | inline |
| deviceName_ | PlatformIntegrator | private |
| devicePackage() const | Stratix3DevKitIntegrator | virtual |
| deviceSpeedClass() const | Stratix3DevKitIntegrator | virtual |
| dmem_ | PlatformIntegrator | private |
| dmemCount() const | PlatformIntegrator | |
| dmemGen_ | AlteraIntegrator | private |
| dmemInfo(TTAMachine::AddressSpace *as) const | PlatformIntegrator | |
| dmemInfo(int index) const | PlatformIntegrator | |
| dmemInstance(MemInfo dmem, TTAMachine::FunctionUnit &lsuArch, std::vector< std::string > lsuPorts) | AlteraIntegrator | protectedvirtual |
| dmemType_ | PlatformIntegrator | private |
| errorStream() const | PlatformIntegrator | protected |
| errorStream_ | PlatformIntegrator | private |
| exportUnconnectedPorts(int coreId) | PlatformIntegrator | protectedvirtual |
| generateMemory(MemoryGenerator &memGen, std::vector< TCEString > &generatedFiles, int memIndex, int coreId) | PlatformIntegrator | protectedvirtual |
| generatePinMap() | Stratix3DevKitIntegrator | private |
| hasPinTag(const TCEString &signal) const | PlatformIntegrator | protectedvirtual |
| hdl_ | PlatformIntegrator | private |
| idf() const | PlatformIntegrator | |
| idf_ | PlatformIntegrator | private |
| imem_ | PlatformIntegrator | private |
| imemGen_ | AlteraIntegrator | private |
| imemInfo() const | PlatformIntegrator | |
| imemInstance(MemInfo imem, int coreId) | AlteraIntegrator | protectedvirtual |
| initPlatformNetlist(const ProGe::NetlistBlock *progeBlock) | PlatformIntegrator | protectedvirtual |
| integrateCore(const ProGe::NetlistBlock &cores, int coreId) | PlatformIntegrator | protectedvirtual |
| integrateProcessor(const ProGe::NetlistBlock *ttaCore) | Stratix3DevKitIntegrator | virtual |
| integratorBlock() | PlatformIntegrator | protected |
| integratorBlock_ | PlatformIntegrator | private |
| loadFUExternalPorts(TTAMachine::FunctionUnit &fu) const | PlatformIntegrator | private |
| lsus_ | PlatformIntegrator | private |
| machine() const | PlatformIntegrator | |
| machine_ | PlatformIntegrator | private |
| mapToplevelPorts() | Stratix3DevKitIntegrator | private |
| outputDir_ | PlatformIntegrator | private |
| outputFilePath(TCEString fileName, bool absolute=false) const | PlatformIntegrator | |
| outputPath() const | PlatformIntegrator | |
| parseDataMemories() | PlatformIntegrator | protected |
| PIN_TAG_ | Stratix3DevKitIntegrator | privatestatic |
| pinTag() const | Stratix3DevKitIntegrator | protectedvirtual |
| platformEntityName() const | PlatformIntegrator | protected |
| PlatformIntegrator() | PlatformIntegrator | |
| PlatformIntegrator(const TTAMachine::Machine *machine, const IDF::MachineImplementation *idf, ProGe::HDL hdl, TCEString progeOutputDir, TCEString coreEntityName, TCEString outputDir, TCEString programName, int targetClockFreq, std::ostream &warningStream, std::ostream &errorStream, const MemInfo &imem, MemType dmemType) | PlatformIntegrator | |
| printInfo(std::ostream &stream) const | Stratix3DevKitIntegrator | virtual |
| progeBlock() const | PlatformIntegrator | |
| progeFilePath(TCEString fileName, bool absolute=false) const | PlatformIntegrator | protected |
| progeOutputDir_ | PlatformIntegrator | private |
| progeOutputHdlFiles(std::vector< TCEString > &files) const | PlatformIntegrator | protected |
| programName() const | PlatformIntegrator | protected |
| programName_ | PlatformIntegrator | private |
| projectFileGenerator() const | Stratix3DevKitIntegrator | protectedvirtual |
| quartusGen_ | Stratix3DevKitIntegrator | private |
| readLsuParameters(const TTAMachine::FunctionUnit &lsu) | PlatformIntegrator | protected |
| resetPort() const | PlatformIntegrator | |
| resetPort_ | PlatformIntegrator | private |
| setDeviceFamily(TCEString devFamily) | Stratix3DevKitIntegrator | virtual |
| setDeviceName(TCEString devName) | PlatformIntegrator | inline |
| setSharedOutputDir(const TCEString &sharedDir) | PlatformIntegrator | |
| sharedOutputDir_ | PlatformIntegrator | private |
| Stratix3DevKitIntegrator() | Stratix3DevKitIntegrator | |
| Stratix3DevKitIntegrator(const TTAMachine::Machine *machine, const IDF::MachineImplementation *idf, ProGe::HDL hdl, TCEString progeOutputDir, TCEString coreEntityName, TCEString outputDir, TCEString programName, int targetClockFreq, std::ostream &warningStream, std::ostream &errorStream, const MemInfo &imem, MemType dmemType) | Stratix3DevKitIntegrator | |
| stratix3Pins_ | Stratix3DevKitIntegrator | private |
| targetClockFrequency() const | Stratix3DevKitIntegrator | virtual |
| targetFrequency_ | PlatformIntegrator | private |
| tbFilePath(TCEString fileName, bool absolute=false) const | PlatformIntegrator | protected |
| toplevelBlock() const | PlatformIntegrator | |
| TTA_CORE_CLK | PlatformIntegrator | protectedstatic |
| TTA_CORE_RSTX | PlatformIntegrator | protectedstatic |
| ttaCores_ | PlatformIntegrator | private |
| unconnectedPorts_ | PlatformIntegrator | private |
| warningStream() const | PlatformIntegrator | protected |
| warningStream_ | PlatformIntegrator | private |
| writeNewToplevel() | PlatformIntegrator | protectedvirtual |
| ~AlteraIntegrator() | AlteraIntegrator | virtual |
| ~PlatformIntegrator() | PlatformIntegrator | virtual |
| ~Stratix3DevKitIntegrator() | Stratix3DevKitIntegrator | virtual |
