OpenASIP  2.0
FUTestbenchGenerator.hh
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1 /*
2  Copyright (c) 2002-2010 Tampere University.
3 
4  This file is part of TTA-Based Codesign Environment (TCE).
5 
6  Permission is hereby granted, free of charge, to any person obtaining a
7  copy of this software and associated documentation files (the "Software"),
8  to deal in the Software without restriction, including without limitation
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10  and/or sell copies of the Software, and to permit persons to whom the
11  Software is furnished to do so, subject to the following conditions:
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14  all copies or substantial portions of the Software.
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16  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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23  */
24 /**
25  * @file FUTestbenchGenerator.hh
26  *
27  * Declaration of FUTestbenchGenerator class
28  *
29  * @author Pekka Jääskeläinen 2006,2010 (pekka.jaaskelainen-no.spam-tut.fi)
30  * @author Otto Esko 2010 (otto.esko-no.spam-tut.fi)
31  * @note rating: red
32  */
33 
34 #ifndef TTA_FU_TESTBENCH_GENERATOR_HH
35 #define TTA_FU_TESTBENCH_GENERATOR_HH
36 
37 #include <string>
38 #include <sstream>
39 #include <fstream>
40 #include <vector>
41 #include <map>
42 #include <stdint.h>
43 #include "HDBManager.hh"
44 #include "FUEntry.hh"
45 #include "MemorySystem.hh"
46 #include "TestbenchGenerator.hh"
47 
48 namespace TTAMachine {
49  class Machine;
50 }
51 
52 class MachineState;
53 
55 public:
57 
58  virtual ~FUTestbenchGenerator();
59 
60  virtual void generateTestbench(std::ofstream& file);
61 
62 private:
63 
64  void parseFuPorts();
65 
66  void createMachineState();
67 
68  void createTbInstantiation();
69 
70  void createStimulus();
71 
72  void createTbCode();
73 
74  void
76  PortDataArray& inputs,
77  const std::string& operation,
78  const std::string& portName, uint32_t stimulus);
79 
81 
82  void
84  PortDataArray& inputStimulus,
85  std::vector<uint32_t>& loadStimulus,
86  std::vector<std::string>& operations, PortDataArray& outputStimulus);
87 
88  bool isShiftOrRotOp(const std::string& operation) const;
89 
90  uint32_t truncateStimulus(uint32_t operand, int nBits) const;
91 
95 
97  std::vector<std::string> inputPorts_;
98  std::vector<std::string> outputPorts_;
99  std::string opcodePort_;
100 
103 };
104 
105 #endif
HDB::FUArchitecture
Definition: FUArchitecture.hh:55
HDB::FUEntry
Definition: FUEntry.hh:49
FUTestbenchGenerator
Definition: FUTestbenchGenerator.hh:54
FUTestbenchGenerator::createMachineState
void createMachineState()
Definition: FUTestbenchGenerator.cc:104
FUTestbenchGenerator::truncateStimulus
uint32_t truncateStimulus(uint32_t operand, int nBits) const
Definition: FUTestbenchGenerator.cc:601
FUTestbenchGenerator::fuArch_
HDB::FUArchitecture * fuArch_
Definition: FUTestbenchGenerator.hh:94
FUTestbenchGenerator::msm_
MachineState * msm_
Definition: FUTestbenchGenerator.hh:96
FUTestbenchGenerator::writeInputPortStimulus
void writeInputPortStimulus(PortDataArray &inputs, const std::string &operation, const std::string &portName, uint32_t stimulus)
Definition: FUTestbenchGenerator.cc:434
FUTestbenchGenerator::opcodePort_
std::string opcodePort_
Definition: FUTestbenchGenerator.hh:99
FUTestbenchGenerator::machine_
TTAMachine::Machine * machine_
Definition: FUTestbenchGenerator.hh:101
MemorySystem.hh
FUTestbenchGenerator::parseFuPorts
void parseFuPorts()
Definition: FUTestbenchGenerator.cc:118
FUTestbenchGenerator::FUTestbenchGenerator
FUTestbenchGenerator(HDB::FUEntry *fu)
Definition: FUTestbenchGenerator.cc:67
MachineState
Definition: MachineState.hh:61
FUTestbenchGenerator::isShiftOrRotOp
bool isShiftOrRotOp(const std::string &operation) const
Definition: FUTestbenchGenerator.cc:582
FUEntry.hh
TestbenchGenerator.hh
MemorySystem
Definition: MemorySystem.hh:55
FUTestbenchGenerator::inputPorts_
std::vector< std::string > inputPorts_
Definition: FUTestbenchGenerator.hh:97
FUTestbenchGenerator::outputPorts_
std::vector< std::string > outputPorts_
Definition: FUTestbenchGenerator.hh:98
FUTestbenchGenerator::memSystem_
MemorySystem * memSystem_
Definition: FUTestbenchGenerator.hh:102
HDB::FUImplementation
Definition: FUImplementation.hh:53
FUTestbenchGenerator::createTbCode
void createTbCode()
Definition: FUTestbenchGenerator.cc:371
FUTestbenchGenerator::generateTestbench
virtual void generateTestbench(std::ofstream &file)
Definition: FUTestbenchGenerator.cc:87
FUTestbenchGenerator::createStimulusArrays
void createStimulusArrays(PortDataArray &inputStimulus, std::vector< uint32_t > &loadStimulus, std::vector< std::string > &operations, PortDataArray &outputStimulus)
Definition: FUTestbenchGenerator.cc:499
FUTestbenchGenerator::~FUTestbenchGenerator
virtual ~FUTestbenchGenerator()
Definition: FUTestbenchGenerator.cc:72
TestbenchGenerator
Definition: TestbenchGenerator.hh:47
TestbenchGenerator::PortDataArray
std::map< std::string, std::vector< uint32_t > > PortDataArray
Definition: TestbenchGenerator.hh:56
TTAMachine
Definition: Assembler.hh:48
HDBManager.hh
FUTestbenchGenerator::createTbInstantiation
void createTbInstantiation()
Definition: FUTestbenchGenerator.cc:150
FUTestbenchGenerator::fuEntry_
HDB::FUEntry * fuEntry_
Definition: FUTestbenchGenerator.hh:92
FUTestbenchGenerator::readValuesFromOutPorts
void readValuesFromOutPorts(PortDataArray &outputs)
Definition: FUTestbenchGenerator.cc:476
FUTestbenchGenerator::fuImpl_
HDB::FUImplementation * fuImpl_
Definition: FUTestbenchGenerator.hh:93
FUTestbenchGenerator::createStimulus
void createStimulus()
Definition: FUTestbenchGenerator.cc:268
TTAMachine::Machine
Definition: Machine.hh:73