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47 Memory(memory->start(), memory->end(), memory->MAUSize(),
48 memory->isLittleEndian()),
49 frontend_(frontend), memory_(memory) {
73 newReads_.push_back(std::make_pair(address, 1));
89 newWrites_.push_back(std::make_pair(address, 1));
135 if (idx >
reads_.size()) {
MemoryProxy(SimulatorFrontend &frontend, Memory *memory)
@ SE_MEMORY_ACCESS
Genereated when memory read or write is initiated.
std::vector< MemoryAccess > newWrites_
List of initiated writes.
MemoryAccess readAccess(unsigned int idx) const
std::pair< Word, int > MemoryAccess
virtual Memory::MAU read(ULongWord address) override
unsigned int writeAccessCount() const
virtual void advanceClock()
std::vector< MemoryAccess > reads_
List of initiated reads on the last cycle.
std::vector< MemoryAccess > newReads_
List of initiated reads.
virtual Memory::MAU read(ULongWord address)=0
virtual void write(ULongWord address, MAU data) override
MinimumAddressableUnit MAU
virtual void advanceClock()
virtual void write(ULongWord address, MAU data)=0
SimulationEventHandler & eventHandler()
std::vector< MemoryAccess > writes_
List of initiated writes on the last cycle.
MemoryAccess writeAccess(unsigned int idx) const
SimulatorFrontend & frontend_
unsigned int readAccessCount() const
Memory * memory_
Wrapped memory.