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43 #include <boost/regex.hpp>
45 #include <boost/thread.hpp>
46 #include <boost/bind.hpp>
47 #include <boost/version.hpp>
114 using namespace TPEF;
121 currentMachine_(NULL), simCon_(NULL),
122 machineOwnedByFrontend_(
false), currentProgram_(NULL),
123 programFileName_(
""), programOwnedByFrontend_(
false),
124 currentBackend_(backendType),
125 disassembler_(NULL), executionTracing_(
false),
127 rfAccessTracing_(
false), procedureTransferTracing_(
false),
128 saveProfileData_(
false), saveUtilizationData_(
false),
129 stopPointManager_(NULL), tpef_(NULL),
130 fuResourceConflictDetection_(true),
131 printNextInstruction_(true), printSimulationTimeStatistics_(
false),
132 staticCompilation_(true), traceFileNameSetByUser_(
false), outputStream_(0),
133 memoryAccessTracking_(
false), eventHandler_(NULL), lastRunCycleCount_(0),
134 lastRunTime_(0.0), simulationTimeout_(0), leaveCompiledDirty_(
false),
135 callHistoryLength_(0), zeroFillMemoriesOnReset_(true) {
203 "Cannot load a program without loading a machine first.");
265 return NullMachine::instance();
278 return NullProgram::instance();
304 "Cannot load a program without loading a machine first.");
324 tpef_ = BinaryReader::readBinary(binaryStream);
339 std::string errorMsg = textGen.
text(
354 std::set<POMValidator::ErrorCode> checks;
363 #if (!defined(HAVE_CXX11) && !defined(HAVE_CXX0X))
364 std::auto_ptr<POMValidatorResults> results(validator.
validate(checks));
366 std::unique_ptr<POMValidatorResults> results(validator.
validate(checks));
370 std::string errorMsg = textGen.
text(
373 for (
int i = 0; i < results->
errorCount(); i++) {
374 errorMsg +=
"\n" + results->
error(i).second;
381 results.reset(validator.
validate(checks));
390 for (
int i = 0; i < results->
errorCount(); i++) {
391 errorMsg +=
"\n" + results->
error(i).second;
397 << errorMsg << std::endl
398 <<
"Warning! Reverting to interpretive simulation engine."
419 if (traceDir ==
"") {
454 if (dataSections < 0)
457 for (
int core = 0; core < 1; ++core) {
459 for (
int i = 0; i < dataSections; ++i) {
463 const std::string addressSpaceName =
474 if ((onlyOne != NULL && &addressSpace != onlyOne) ||
475 (addressSpace.
isShared() && core != 0))
continue;
490 > addressSpace.
end()) {
494 std::string(
"Initialization data for ") +
495 addressSpace.
name() +
496 " is out of address space bounds.");
498 for (
int m = 0; m < def.
size(); m++) {
505 std::string errorMsg =
515 __FILE__, __LINE__,
__func__, errorMsg);
613 std::ifstream inputFile(fileName.c_str());
617 std::string adfName =
"";
637 for (
int i = 0; i < num_mems; i++) {
639 boost::shared_ptr<RemoteMemory> rmem =
640 boost::static_pointer_cast<RemoteMemory>(memptr);
641 assert(rmem != NULL &&
"not a RemoteMemory!");
642 rmem->setController(con);
716 for (
int i = 0; i < navigator.
count(); ++i) {
726 __FILE__, __LINE__,
__func__,
"No boolean register found.");
739 const std::string& rfName,
int registerIndex) {
753 const std::string& iuName,
int index) {
768 const std::string& fuName,
const std::string& portName) {
791 std::string regFileName = rfName;
792 if (!navigator.
hasItem(rfName)) {
795 "Register file " + rfName +
" not found.");
803 "Register index out of range");
820 const std::string& fuName,
const std::string& portName) {
823 const std::string exceptionMessage =
824 std::string(
"No port ") + fuName +
"." + portName +
" found.";
841 int operandNumber = -1;
848 __FILE__, __LINE__,
__func__, exceptionMessage);
854 operandNumber)->
name(),
862 __FILE__, __LINE__,
__func__, exceptionMessage);
897 __FILE__, __LINE__,
__func__,
"State not found.");
899 boost::smatch parsed;
912 searchString, parsed,
915 return findPort(parsed[1], parsed[2]);
920 std::string(
"No state found with the search string '") +
921 std::string(searchString) +
"'.");
939 std::time_t now = time(NULL);
959 #if BOOST_VERSION < 105000
960 boost::xtime_get(&xt, boost::TIME_UTC);
964 boost::xtime_get(&xt, boost::TIME_UTC_);
966 unsigned int pollTime = 5;
970 xtPoll.sec += pollTime;
971 while (xt.sec > xtPoll.sec) {
972 boost::thread::sleep(xtPoll);
973 xtPoll.sec += pollTime;
974 if (simCon != simFE->
simCon_) {
978 boost::thread::sleep(xt);
980 if (simCon != simFE->
simCon_) {
999 boost::thread timeout(
1078 theInstruction.
parent());
1080 bool firstInstructionInProcedure =
1083 std::string disassembly =
"";
1087 if (firstInstructionInProcedure) {
1088 disassembly +=
"\n" + currentProc.
name() +
":\n";
1119 if (instructionAddress >= programLastAddress) {
1133 std::stringstream tempStream;
1135 tempStream << std::setw(7) << std::right << instructionAddress <<
" ";
1137 << std::setw(30) << std::right <<
1138 std::string(
"<") + currentProc.
name() +
"+" +
1142 return tempStream.str();
1427 for (
int core = 0; core < 1; ++core) {
1431 if (traceDB == NULL) {
1437 if (coreCount > 1) {
1438 coreMarker <<
".core";
1442 if (coreCount > 1) {
1448 int runningNumber = 1;
1453 if (coreCount > 1) {
1458 fname <<
"." << runningNumber;
1461 traceFileName = fname;
1484 simCon_)->instructionMemory(core));
1495 busTraceFileName <<
".core" << core;
1497 busTraceFileName <<
".bustrace";
1499 int runningNumber = 1;
1506 busTraceFileName <<
".core" << core;
1508 busTraceFileName <<
".bustrace";
1509 busTraceFileName <<
"." << runningNumber;
1513 std::ostream* busTraceStream =
1514 new std::ofstream(busTraceFileName.c_str(), std::ios::out);
1515 if (!busTraceStream) {
1516 std::string errorMessage =
1517 "Unable to open bus trace file " + busTraceFileName +
1520 __FILE__, __LINE__,
__func__, errorMessage);
1547 for (
int core = 0; core < 1; ++core) {
1555 for (RFAccessTracker::ConcurrentRFAccessIndex::const_iterator i =
1556 accesses.begin(); i != accesses.end(); ++i) {
1558 const std::string& rfName = access.get<0>();
1559 const std::size_t& reads = access.get<2>();
1560 const std::size_t& writes = access.get<1>();
1563 rfName, reads, writes, count);
1572 for (
int i = 0; i <= fuNav.
count(); ++i) {
1574 if (i < fuNav.
count())
1582 if (totalTriggersOfFU == 0)
1588 const std::string operationUpper =
1594 if (executions == 0)
1598 fu->
name(), operationUpper, executions);
1606 for (
int i = 0; i < socketNav.
count(); ++i) {
1619 for (
int i = 0; i < busNav.
count(); ++i) {
1630 for (
int i = 0; i < rfNav.
count(); ++i) {
1636 for (
int reg = 0; reg < maxRegs; ++reg) {
1642 rf->
name(), reg, reads, writes);
1653 instructionMemory(core);
1705 for (
int core = 0; core < 1; ++core) {
1714 std::string controlUnitASName =
"";
1720 for (
int i = 0; i < nav.
count(); ++i) {
1723 if (space.
name() == controlUnitASName)
1726 const bool shared = space.
isShared();
1730 if (shared && firstMemorySystem != NULL) {
1733 mem = firstMemorySystem->
memory(space.
name());
1757 "Internal error: memory model not specified");
1769 if (firstMemorySystem == NULL)
1770 firstMemorySystem = memorySystem_;
1872 __FILE__, __LINE__,
__func__,
"RF access tracing is disabled.");
1953 SimulatorFrontend::setTraceDBBaseFileName(
const std::string& fileName) {
1954 traceFileBaseName_ = fileName;
1955 traceFileBaseNameSetByUser_ =
true;
2141 assert(simCon != NULL &&
"Wrong TTASimulationController implementation.");
2163 if (utilizationStats == NULL) {
2170 simCon_)->instructionMemory(core));
2180 utilizationStats = compiledSimUtilizationStats;
2184 return *utilizationStats;
2197 simCon_)->instructionMemory();
2213 simCon_)->instructionMemory();
2307 report.first = severity;
2308 report.second = description;
2325 for (ProgramErrorDescriptionList::iterator i =
2328 if ((*i).first == severity) {
2347 for (ProgramErrorDescriptionList::iterator i =
2350 if ((*i).first == severity)
2383 for (
int core = 0; core < 1;
2421 if (differences != NULL)
2423 <<
"SIMULATION ERROR DETECTED (PCs DIFFER)" << std::endl
2424 <<
"--------------------------------------" << std::endl
2431 bool errorLocationPrinted =
false;
2436 for (
int i = 0; i < rfNav.
count(); ++i) {
2438 for (
int reg = 0; reg < rf.
size(); ++reg) {
2439 std::string thisReg =
2441 std::string otherReg =
2443 if (thisReg != otherReg) {
2445 if (!errorLocationPrinted && differences != NULL) {
2446 std::string procedureName =
2451 <<
"DIFFERING REGISTER FILE VALUES" << std::endl
2452 <<
"------------------------------" << std::endl
2455 <<
"previous PC: " << previousPC << std::endl
2456 <<
" function: " << procedureName << std::endl
2457 <<
"disassembly around previous PC:" << std::endl;
2459 std::max(0, (
int)previousPC - 5);
2460 int end = previousPC + 5;
2461 for (
int instr = start; instr <= end; ++instr) {
2462 if (instr == (
int)previousPC)
2463 *differences <<
"==> ";
2466 program().instructionAt(instr),
2470 errorLocationPrinted =
true;
2472 if (differences != NULL)
2474 << rf.
name() <<
"." << reg <<
": "
2475 << thisReg <<
" (this) vs. "
2476 << otherReg <<
" (other)" << std::endl;
2481 errorLocationPrinted =
false;
2485 for (
int i = 0; i < fuNav.
count(); ++i) {
2488 for (
int port = 0; port < fu.
portCount(); ++port) {
2492 std::string portName = fu.
port(port)->
name();
2500 if (!errorLocationPrinted && differences != NULL) {
2501 std::string procedureName =
2506 <<
"DIFFERING FUNCTION UNIT PORT VALUES" << std::endl
2507 <<
"-----------------------------------" << std::endl
2510 <<
"previous PC: " << previousPC << std::endl
2511 <<
" function: " << procedureName << std::endl
2512 <<
"disassembly around previous PC:" << std::endl;
2514 std::max(0, (
int)previousPC - 5);
2515 int end = previousPC + 5;
2516 for (
int instr = start; instr <= end; ++instr) {
2517 if (instr == (
int)previousPC)
2518 *differences <<
"==> ";
2521 program().instructionAt(instr),
true)
2524 errorLocationPrinted =
true;
2526 if (differences != NULL)
2529 << thisReg.
intValue() <<
" (this) vs. "
2530 << otherReg.
intValue() <<
" (other)" << std::endl;
const CallPathTracker & callPathTracker(int core=-1) const
virtual MemorySystem & memorySystem(int coreId=-1)
double lastRunTime_
The wall clock time of the last non-interrupted simulation phase in seconds.
bool saveProfileData_
Is saving of profile data to TraceDB enabled.
bool simulationTimeStatistics() const
bool printNextInstruction_
If true, the next simulated instructions is printed to stdout when simulation stops.
virtual std::string registerFileValue(const std::string &rfName, int registerIndex=-1)=0
void addStatistics(SimulationStatisticsCalculator &statisticsType)
std::vector< bool > traceDBOwned_
Whether traceDB at index is owned by simulator (or taken away by client using lastTraceDB())
virtual InstructionAddress lastExecutedInstruction(int coreId=-1) const
void addAddressSpace(const TTAMachine::AddressSpace &as, MemoryPtr mem, bool shared=true)
const ExecutableInstruction & instructionAtConst(InstructionAddress address) const
void setControllerForMemories(RemoteController *con)
std::vector< UtilizationStats * > utilizationStats_
Processor utilization statistics.
void setProcedureTransferTracing(bool value)
UInt32 InstructionAddress
void setMemoryAccessTracking(bool value)
SimulatorFrontend(SimulationType backend=SIM_NORMAL)
bool memoryAccessTracking() const
void addBusWriteCount(BusID socket, ClockCycleCount count)
@ SIM_REMOTE
Remote debugger, not a simulator at all.
bool procedureTransferTracing_
Is procedure transfer access tracking enabled.
TTASimulationController * simCon_
If simulation is initialized, this contains a pointer to the simulation controller.
virtual TCEString name() const
const TTAProgram::Program & program() const
@ CONNECTION_MISSING
Connection required for a move is missing.
ClockCycleCount triggerCount(const std::string &fuName) const
@ SIM_COMPILED
Compiled, faster simulation.
@ STA_STOPPED
Simulation stopped for some reason.
void setSourceFile(const std::string &fileName)
void initializeMemorySystem()
bool rfAccessTracing() const
int procedureCount() const
Error error(int index) const
virtual Address startAddress() const
bool procedureTransferTracing() const
virtual bool hasAddressSpace() const
TTAMachine::Machine * machine
the architecture definition of the estimated processor
@ SRE_USER_REQUESTED
User requested the simulation to stop explicitly, e.g., by pressing ctrl-c in the CLI.
Address startAddress() const
@ SIMULATION_NOT_POSSIBLE
Program contains operations with unknown behaviour.
ClockCycleCount executionCount() const
SimulationType currentBackend_
Type of "backend" this Frontend has.
std::map< ConcurrentRFAccess, ClockCycleCount > ConcurrentRFAccessIndex
concurrent accesses and their counts
bool busTracing_
Is bus tracing, i.e., storing the values of buses in each clock cycle enabled.
std::string forcedTraceDBFileName_
If set, forces the SQLite filename of trace DB to this name.
@ SRE_AFTER_TIMEOUT
Stopped after simulation timeout instruction.
bool profileDataSaving() const
boost::tuple< std::string, std::size_t, std::size_t > ConcurrentRFAccess
type to be used as a key for storing concurrent access info
friend void timeoutThread(unsigned int timeout, SimulatorFrontend *simFE)
PortState & portState(const std::string &portName, const std::string &fuName)
const TTAMachine::Machine & machine() const
virtual SimValue immediateUnitRegisterValue(const std::string &iuName, int index=-1)
@ LONG_IMMEDIATE_NOT_SUPPORTED
Instruction template missing for a long immediate.
bool zeroFillMemoriesOnReset_
Set to true in case the memories should be set to zero at reset.
bool stoppedByUser() const
void fillAllMemoriesWithZero()
virtual void runUntil(UIntWord address)=0
std::vector< ExecutionTrace * > traceDBs_
The database to use for execution trace data.
ClockCycleCount socketWrites(const std::string &socketName) const
#define IGNORE_CLANG_WARNING(X)
std::ostream & outputStream()
const TTAMachine::AddressSpace & addressSpace() const
bool fuResourceConflictDetection() const
bool isSimulationStopped() const
virtual void next(int count=1)
void setCause(const Exception &cause)
const TTAMachine::AddressSpace & space() const
int dataDefinitionCount() const
static POMDisassembler * disassembler(const TTAMachine::Machine &mach, const TTAProgram::Program &program)
void setStaticCompilation(bool value)
std::string architectureName()
virtual void step(double count=1)=0
std::vector< ProcedureTransferTracker * > procedureTransferTrackers_
The procedure transfer tracker.
static NullPortState & instance()
virtual BaseFUPort * port(const std::string &name) const
void addRegisterAccessCount(RegisterFileID registerFile, RegisterID registerIndex, ClockCycleCount reads, ClockCycleCount writes)
virtual AddressSpace * addressSpace() const
virtual Address startAddress() const
void setOutputStream(std::ostream &stream)
virtual bool automaticFinishImpossible() const
virtual void prepareToStop(StopReason reason)
virtual boost::format text(int textId)
void initializeDataMemories(const TTAMachine::AddressSpace *onlyOne=NULL)
bool printSimulationTimeStatistics_
True if the simulation time statistics should be printed out.
bool isMachineLoaded() const
@ TXT_UNABLE_TO_LOAD_PROGRAM
void loadProcessorConfiguration(const std::string &fileName)
virtual unsigned int stopReasonCount() const
static std::string fileOfPath(const std::string pathName)
static std::string toString(const T &source)
StopPointManager * stopPointManager_
The breakpoint manager to be used to bookkeep breakpoints.
bool staticCompilation() const
unsigned int stopReasonCount() const
void addFunctionUnitOperationTriggerCount(FunctionUnitID functionUnit, OperationID operation, OperationTriggerCount count)
StateData & findBooleanRegister()
virtual void calculate(const TTAProgram::Program &program, const CompiledSimulation &compiledSim)
std::pair< RuntimeErrorSeverity, std::string > ProgramErrorDescription
A type for storing a program error description.
void setTimeout(unsigned int value)
virtual int numberOfRegisters() const
bool isLittleEndian() const
boost::shared_ptr< Memory > MemoryPtr
const TTAProgram::Program * currentProgram_
Program to be simulated.
SimulationType
Which type of simulation this SimulatorFrontend controls or connects to.
@ STA_RUNNING
A run command (run, stepi, until...) given.
virtual bool isShared() const
void initializeDisassembler() const
#define assert(condition)
unsigned int memoryCount() const
InstructionAddress programCounter() const
virtual void loadMachine(const std::string &fileName)
Instruction & instructionAt(InstructionAddress address) const
std::ostream * outputStream_
Default output stream.
virtual FUPort * port(int operand) const
unsigned int simulationTimeout_
Simulation timeout in seconds.
StateData & findRegister(const std::string &rfName, int registerIndex)
void setCallHistoryLength(std::size_t length)
std::size_t callHistoryLength_
The length of call history to store in memory for the commands that need it.
@ COMPILED_SIMULATION_NOT_POSSIBLE
Compiled simulation is not possible.
virtual ControlUnit * controlUnit() const
bool fuResourceConflictDetection_
If this is enabled before initialization, FU resource conflicts are detected (slows down simulation).
void setPCFDirectory(const std::string &path)
const std::string & name() const
TPEF::Binary * tpef_
The source TPEF file.
bool programOwnedByFrontend_
Is the program owned by SimulatorFrontend or by the client?
@ STA_INITIALIZED
Simulation initialized and ready to run.
virtual SimulationStatus state() const
@ STA_FINISHED
Simulation ended after executing the last instruction.
ClockCycleCount lastRunCycleCount_
The cycle count of the last non-interrupted simulation phase.
const UtilizationStats & utilizationStatistics(int core=-1)
bool hasItem(const std::string &name) const
DataMemory & dataMemory(int index) const
virtual bool isInitialized() const
bool compareState(SimulatorFrontend &other, std::ostream *differences=NULL)
const ExecutableInstruction & executableInstructionAt(InstructionAddress address) const
static std::string directoryOfPath(const std::string fileName)
virtual std::string toString() const
CodeSnippet & parent() const
const SimValue & stateValue(std::string searchString)
virtual FunctionUnitNavigator functionUnitNavigator() const
std::string programErrorReport(RuntimeErrorSeverity severity, std::size_t index)
ClockCycleCount busWrites(const std::string &busName) const
std::vector< BusTracker * > busTrackers_
The tracker for saving bus trace.
virtual void loadProgram(const std::string &fileName)
virtual ~SimulatorFrontend()
@ SIM_OTA
Simulation with operation-triggered implicit data transports.
ClockCycleCount operationExecutions(const std::string &operationName) const
virtual int operationCount() const
virtual InstructionAddress programCounter() const =0
StopReason
The reasons to stop simulation.
std::vector< CallPathTracker * > callPathTrackers_
The call path trackers for each core, in case tracking is enabled.
void setProfileDataSaving(bool value)
InstructionAddress location() const
@ SRE_RUNTIME_ERROR
A fatal runtime error occured in the simulated program.
@ SRE_BREAKPOINT
Stopped because of at least one breakpoint.
@ SE_RUNTIME_ERROR
Sent when a runtime error is detected in the simulated program.
bool isCompiledSimulation() const
virtual InstructionAddress lastExecutedInstruction(int coreId=-1) const
bool hasStopReason(StopReason reason) const
virtual AddressSpaceNavigator addressSpaceNavigator() const
virtual SocketNavigator socketNavigator() const
std::size_t programErrorReportCount(RuntimeErrorSeverity severity)
virtual SimValue FUPortValue(const std::string &fuName, const std::string &portName)
virtual bool isOutput() const
bool leaveCompiledDirty_
True in case the compilation simulation should not cleanup at destruction the engine source files.
virtual StopReason stopReason(unsigned int index) const
StateData & findPort(const std::string &fuName, const std::string &portName)
virtual int portCount() const
ProgramErrorDescriptionList programErrorReports_
Runtime error reports.
std::string errorMessage() const
int dataMemoryCount() const
std::time_t startTime_
The time of the last simulation start. Used to compute simulation speed.
void setupCallHistoryTracking()
static const std::string DIRECTORY_SEPARATOR
@ SIM_CUSTOM
User-implemented remote HW debugger.
bool isSimulationRunning() const
StateData & state(std::string searchString)
void addConcurrentRegisterFileAccessCount(RegisterFileID registerFile, RegisterAccessCount reads, RegisterAccessCount writes, ClockCycleCount count)
virtual void killSimulation()
void clearProgramErrorReports()
virtual int width() const
bool isCustomDebugger() const
const TTAProgram::Procedure & currentProcedure() const
void setRFAccessTracing(bool value)
virtual SimValue immediateUnitRegisterValue(const std::string &iuName, int index=-1)=0
bool isProgramLoaded() const
virtual RegisterFileNavigator registerFileNavigator() const
const TTAMachine::Machine * currentMachine_
Machine to run simulation with.
static std::string disassemble(const TTAProgram::Move &move)
ClockCycleCount cycleCount() const
virtual void step(double count=1)
POMDisassembler * disassembler_
The disassembler used to print out instructions. This is initialized on demand.
virtual boost::shared_ptr< CompiledSimulation > compiledSimulation()
void addProcedureAddressRange(InstructionAddress firstAddress, InstructionAddress lastAddress, const std::string &procedureName)
void setUtilizationDataSaving(bool value)
const ConcurrentRFAccessIndex & accessDataBase() const
MemorySystem & memorySystem(int coreId=-1)
static std::string simTraceDirPath()
SimulationEventHandler & eventHandler()
virtual RegisterState & registerState(int index)
find Finds info of the inner loops in the false
bool executionTracing_
Is execution tracing, i.e., storing the executed instruction addresses to the trace database,...
std::vector< RFAccessTracker * > rfAccessTrackers_
The register file access tracker.
virtual ClockCycleCount clockCount() const
long long CycleCount
Type for storing simulation cycle counts.
MachineState & machineState(int core=-1)
static bool fileExists(const std::string fileName)
ClockCycleCount registerWrites(const std::string &rfName, int registerIndex) const
void setExecutionTracing(bool value)
virtual std::string name() const
bool utilizationDataSaving() const
const RFAccessTracker & rfAccessTracker() const
bool memoryAccessTracking_
If this is enabled before initialization, memory access tracking is enabled. (slows down simulation)
bool machineOwnedByFrontend_
Is the machine owned by SimulatorFrontend or by the client?
void setSimulationTimeStatistics(bool value)
CycleCount lastRunCycleCount() const
virtual BusNavigator busNavigator() const
virtual void generateCompiledSimTexts()
void addInstructionExecutionCount(InstructionAddress address, ClockCycleCount count)
virtual void initializeSimulation()
MemoryPtr memory(const TTAMachine::AddressSpace &as)
DataDefinition & dataDefinition(Address address) const
virtual void next(int count=1)=0
virtual SimValue FUPortValue(const std::string &fuName, const std::string &portName)=0
CycleCount startCycleCount_
The cycle count when the latest simulation was started. Used to compute simulation speed.
bool detailedSimulation_
Set to true in case should build a detailed model which simulates FU stages, possibly with an externa...
virtual void runUntil(UIntWord address)
std::string disassembleInstruction(UIntWord instructionAddress) const
StopReason stopReason(unsigned int index) const
virtual const SimValue & value() const =0
double lastRunTime() const
bool staticCompilation_
True if the compiled simulation should use static compilation.
TTAMachine::Machine * readMachine()
virtual Address endAddress() const
CycleCount ClockCycleCount
Alias for ClockCycleCount.
bool executionTracing() const
bool saveUtilizationData_
Is saving of utilization data to TraceDB enabled.
std::string programLocationDescription() const
void setNextInstructionPrinting(bool value)
ComponentType * item(int index) const
std::vector< ExecutionTracker * > executionTrackers_
The simple execution tracker for storing trace of executed instructions.
virtual HWOperation * operation(const std::string &name) const
ClockCycleCount registerReads(const std::string &rfName, int registerIndex) const
find Finds info of the inner loops in the program
virtual std::string registerFileValue(const std::string &rfName, int registerIndex=-1)
static int toInt(const T &source)
bool hasSimulationEnded() const
Instruction & lastInstruction() const
bool nextInstructionPrinting() const
Procedure & lastProcedure() const
POMValidatorResults * validate(const std::set< ErrorCode > &errorsToCheck)
void setFUResourceConflictDetection(bool value)
SimulationEventHandler * eventHandler_
Per simulation instance of SimulationEventHandler.
virtual MachineState & machineState(int core=-1)
virtual TCEString disassembleInstruction(const TTAProgram::Instruction &instruction, int addr=-1)
"Template methods" that can be overridden in the derived assemblers.
std::vector< MemorySystem * > memorySystems_
The simulation models of the memories in the currently loaded machine for each core.
bool isTCEDebugger() const
void reportSimulatedProgramError(RuntimeErrorSeverity severity, const std::string &description)
int globalGuardLatency() const
SpecialRegisterPort * returnAddressPort() const
static bool fileIsReadable(const std::string fileName)
const ExecutableInstruction & lastExecInstruction() const
virtual int width() const
@ TXT_NO_ADF_DEFINED_IN_PCF
void timeoutThread(unsigned int timeout, SimulatorFrontend *simFE)
const TTAMachine::AddressSpace & addressSpace(unsigned int i)
virtual ULongWord start() const
Procedure & procedure(int index) const
void setSimulatedCycleCount(ClockCycleCount count)
virtual ULongWord end() const
bool isSimulationInitialized() const
std::string programFileName_
The source file of the program to be simulated. Used to generate the file name of the trace data base...
StopPointManager & stopPointManager()
void setBusTracing(bool value)
RuntimeErrorSeverity
The severities of runtime errors.
void setCompiledSimulation(bool value)
bool automaticFinishImpossible() const
void addSocketWriteCount(SocketID socket, ClockCycleCount)
ExecutionTrace * lastTraceDB(int core=-1)
bool rfAccessTracing_
Is register file (concurrent) access tracking enabled.
void prepareToStop(StopReason reason)
RegisterFileState & registerFileState(const std::string &name)
virtual MinimumAddressableUnit MAU(int index) const
@ SIM_NORMAL
Default, interpreted simulation (debugging engine).