OpenASIP  2.0
TransportPipeline.hh
Go to the documentation of this file.
1 /*
2  Copyright (c) 2002-2009 Tampere University.
3 
4  This file is part of TTA-Based Codesign Environment (TCE).
5 
6  Permission is hereby granted, free of charge, to any person obtaining a
7  copy of this software and associated documentation files (the "Software"),
8  to deal in the Software without restriction, including without limitation
9  the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  and/or sell copies of the Software, and to permit persons to whom the
11  Software is furnished to do so, subject to the following conditions:
12 
13  The above copyright notice and this permission notice shall be included in
14  all copies or substantial portions of the Software.
15 
16  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19  THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21  FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22  DEALINGS IN THE SOFTWARE.
23  */
24 /**
25  * @file TransportPipeline.hh
26  *
27  * Declaration of TransportPipeline class.
28  *
29  * @author Jussi Nykänen 2004 (nykanen-no.spam-cs.tut.fi)
30  * @author Pekka Jääskeläinen 2005 (pjaaskel-no.spam-cs.tut.fi)
31  * @note rating: red
32  */
33 
34 #ifndef TTA_TRANSPORT_PIPELINE_HH
35 #define TTA_TRANSPORT_PIPELINE_HH
36 
37 #include <string>
38 
39 #include "OperationExecutor.hh"
40 #include "OperationContext.hh"
41 
42 class FUState;
43 class GCUState;
44 class Operation;
45 
46 /**
47  * Models the transport pipeline of global control unit.
48  */
50 public:
52  virtual ~TransportPipeline();
53 
54  virtual int latency() const;
55  virtual void startOperation(Operation& op);
56  virtual void advanceClock();
57  virtual OperationExecutor* copy();
58  virtual void setContext(OperationContext& context);
59  bool hasPendingOperations() const {
60  return true;
61  }
62 
63 private:
64  /// Assignment not allowed.
66 
67  /// Operation to be triggered next.
69  /// Operation context used to fetch the values for PC and RA.
71  /// Operation context seen by the operation.
73  /// Storage for PC value in the context.
75  /// Storage for IRF block start in the context.
77  /// Storage for RA value in the context.
79  /// Branch delay cycles
81  /// The owner GCUState.
83 
84 };
85 
86 #endif
TransportPipeline::tempContext_
OperationContext tempContext_
Operation context seen by the operation.
Definition: TransportPipeline.hh:72
TransportPipeline::operator=
TransportPipeline & operator=(const TransportPipeline &)
Assignment not allowed.
InstructionAddress
UInt32 InstructionAddress
Definition: BaseType.hh:175
TransportPipeline::parent_
GCUState & parent_
The owner GCUState.
Definition: TransportPipeline.hh:82
TransportPipeline::copy
virtual OperationExecutor * copy()
Definition: TransportPipeline.cc:139
GCUState
Definition: GCUState.hh:46
TransportPipeline::PC_
InstructionAddress PC_
Storage for PC value in the context.
Definition: TransportPipeline.hh:74
OperationContext
Definition: OperationContext.hh:56
TransportPipeline::TransportPipeline
TransportPipeline(GCUState &parent)
Definition: TransportPipeline.cc:57
TransportPipeline::branchDelayCycles_
int branchDelayCycles_
Branch delay cycles.
Definition: TransportPipeline.hh:80
TransportPipeline::setContext
virtual void setContext(OperationContext &context)
Definition: TransportPipeline.cc:149
SimValue
Definition: SimValue.hh:96
FUState
Definition: FUState.hh:58
TransportPipeline::context_
OperationContext * context_
Operation context used to fetch the values for PC and RA.
Definition: TransportPipeline.hh:70
OperationExecutor.hh
TransportPipeline::startOperation
virtual void startOperation(Operation &op)
Definition: TransportPipeline.cc:96
TransportPipeline::operation_
Operation * operation_
Operation to be triggered next.
Definition: TransportPipeline.hh:68
TransportPipeline::hasPendingOperations
bool hasPendingOperations() const
Definition: TransportPipeline.hh:59
OperationExecutor
Definition: OperationExecutor.hh:49
Operation
Definition: Operation.hh:59
OperationExecutor::parent
FUState & parent() const
TransportPipeline::advanceClock
virtual void advanceClock()
Definition: TransportPipeline.cc:130
TransportPipeline::IBS_
InstructionAddress IBS_
Storage for IRF block start in the context.
Definition: TransportPipeline.hh:76
TransportPipeline::~TransportPipeline
virtual ~TransportPipeline()
Definition: TransportPipeline.cc:71
TransportPipeline::latency
virtual int latency() const
Definition: TransportPipeline.cc:81
TransportPipeline
Definition: TransportPipeline.hh:49
OperationContext.hh
TransportPipeline::RA_
SimValue RA_
Storage for RA value in the context.
Definition: TransportPipeline.hh:78