OpenASIP 2.2
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MemoryProxy.cc
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1/*
2 Copyright (c) 2002-2009 Tampere University.
3
4 This file is part of TTA-Based Codesign Environment (TCE).
5
6 Permission is hereby granted, free of charge, to any person obtaining a
7 copy of this software and associated documentation files (the "Software"),
8 to deal in the Software without restriction, including without limitation
9 the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 and/or sell copies of the Software, and to permit persons to whom the
11 Software is furnished to do so, subject to the following conditions:
12
13 The above copyright notice and this permission notice shall be included in
14 all copies or substantial portions of the Software.
15
16 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 DEALINGS IN THE SOFTWARE.
23 */
24/**
25 * @file MemoryProxy.cc
26 *
27 * Implementation of MemoryProxy class.
28 *
29 * @author Veli-Pekka Jääskeläinen 2007 (vjaaskel-no.spam-cs.tut.fi)
30 * @note rating: red
31 */
32
33#include "MemoryProxy.hh"
34#include "SimulatorToolbox.hh"
36#include "SimulatorFrontend.hh"
37
38
39/**
40 * The Constructor.
41 *
42 * MemoryProxy takes ownership of the wrapped Memory instance.
43 *
44 * @param memory Tracked memory.
45 */
47 Memory(memory->start(), memory->end(), memory->MAUSize(),
48 memory->isLittleEndian()),
49 frontend_(frontend), memory_(memory) {
50}
51
52
53/**
54 * The Destructor.
55 *
56 * Deletes the tracked memory instance.
57 */
61
62/**
63 * Tracks read calls.
64 *
65 * Passes the call to the wrapped memory.
66 */
69
72
73 newReads_.push_back(std::make_pair(address, 1));
74 return memory_->read(address);
75}
76
77/**
78 * Tracks write calls.
79 *
80 * Passes the call to the wrapped memory.
81 */
82void
84 ULongWord address, MAU data) {
85
88
89 newWrites_.push_back(std::make_pair(address, 1));
90 memory_->write(address, data);
91}
92
93/**
94 * Resets the memory access information for the last cycle when
95 * wrapped memory clock is advanced.
96 */
97void
105
106/**
107 * Resets all memory access information when the wrapped memory is reset.
108 */
109void
111 reads_.clear();
112 writes_.clear();
113 newReads_.clear();
114 newWrites_.clear();
115 memory_->reset();
116}
117
118/**
119 * Returns number of read accesses on the last cycle.
120 */
121unsigned int
123 return reads_.size();
124}
125
126/**
127 * Returns information of the given memory read access.
128 *
129 * @param idx Index of the read access.
130 * @exception OutOfRange If the index is invalid.
131 */
133MemoryProxy::readAccess(unsigned idx) const {
134
135 if (idx > reads_.size()) {
136 throw OutOfRange(__FILE__, __LINE__, __func__);
137 }
138 return reads_[idx];
139}
140
141/**
142 * Returns number of write accesses on the last cycle.
143 */
144unsigned int
146 return writes_.size();
147}
148
149
150/**
151 * Returns information of the given memory write access.
152 *
153 * @param idx Index of the write access.
154 * @exception OutOfRange If the index is invalid.
155 */
157MemoryProxy::writeAccess(unsigned idx) const {
158
159 if (idx > writes_.size()) {
160 throw OutOfRange(__FILE__, __LINE__, __func__);
161 }
162 return writes_[idx];
163}
164
#define __func__
unsigned long ULongWord
Definition BaseType.hh:51
void handleEvent(int event)
Memory * memory_
Wrapped memory.
std::pair< Word, int > MemoryAccess
virtual Memory::MAU read(ULongWord address) override
virtual void advanceClock()
virtual void reset()
std::vector< MemoryAccess > newReads_
List of initiated reads.
virtual void write(ULongWord address, MAU data) override
MemoryAccess writeAccess(unsigned int idx) const
unsigned int readAccessCount() const
SimulatorFrontend & frontend_
unsigned int writeAccessCount() const
std::vector< MemoryAccess > writes_
List of initiated writes on the last cycle.
std::vector< MemoryAccess > reads_
List of initiated reads on the last cycle.
virtual ~MemoryProxy()
MemoryProxy(SimulatorFrontend &frontend, Memory *memory)
MemoryAccess readAccess(unsigned int idx) const
std::vector< MemoryAccess > newWrites_
List of initiated writes.
virtual void reset()
Definition Memory.cc:716
virtual void advanceClock()
Definition Memory.cc:819
virtual void write(ULongWord address, MAU data)=0
Definition Memory.cc:95
virtual Memory::MAU read(ULongWord address)=0
Definition Memory.cc:160
MinimumAddressableUnit MAU
Definition Memory.hh:76
@ SE_MEMORY_ACCESS
Genereated when memory read or write is initiated.
SimulationEventHandler & eventHandler()