OpenASIP 2.2
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MemoryProxy.hh
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1/*
2 Copyright (c) 2002-2009 Tampere University.
3
4 This file is part of TTA-Based Codesign Environment (TCE).
5
6 Permission is hereby granted, free of charge, to any person obtaining a
7 copy of this software and associated documentation files (the "Software"),
8 to deal in the Software without restriction, including without limitation
9 the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 and/or sell copies of the Software, and to permit persons to whom the
11 Software is furnished to do so, subject to the following conditions:
12
13 The above copyright notice and this permission notice shall be included in
14 all copies or substantial portions of the Software.
15
16 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 DEALINGS IN THE SOFTWARE.
23 */
24/**
25 * @file MemoryProxy.hh
26 *
27 * Declaration of MemoryProxy class.
28 *
29 * @author Veli-Pekka Jääskeläinen 2007 (vjaaskel-no.spam-cs.tut.fi)
30 * @note rating: red
31 */
32
33
34#ifndef TTA_MEMORY_PROXY_HH
35#define TTA_MEMORY_PROXY_HH
36
37#include "Memory.hh"
38#include <utility>
39#include <vector>
40
42
43/**
44 * MemoryProxy is a memory access tracker for simulator.
45 *
46 * MemoryProxy tracks calls to reads and writes.
47 * Memory accesses on the last clock cycle can be listed
48 * with readAccessCount(), readAccess(idx), writeAccessCount()
49 * and writeAccess(idx) functions. Memory access information is
50 * stored for only one cycle. Tracks only single memory accesses, not
51 * those made with the block methods.
52 */
53class MemoryProxy : public Memory {
54public:
55
56 typedef std::pair<Word, int> MemoryAccess;
57
58 MemoryProxy(SimulatorFrontend& frontend, Memory* memory);
59 virtual ~MemoryProxy();
60
61 virtual void advanceClock();
62 virtual void reset();
63
64 virtual void write(ULongWord address, MAU data) override;
65 virtual Memory::MAU read(ULongWord address) override;
66
67 virtual void write(ULongWord address, int size, ULongWord data)
68 { memory_->write(address, size, data); }
69 virtual void read(ULongWord address, int size, ULongWord& data)
70 { memory_->write(address, size, data); }
71
72 virtual void fillWithZeros() { memory_->fillWithZeros(); }
73
74 unsigned int readAccessCount() const;
75 unsigned int writeAccessCount() const;
76
77 MemoryAccess readAccess(unsigned int idx) const;
78
79 MemoryAccess writeAccess(unsigned int idx) const;
80
81private:
83
84 /// Wrapped memory.
86 /// Copying not allowed.
88 /// Assignment not allowed.
90
91 /// List of initiated reads on the last cycle.
92 std::vector<MemoryAccess> reads_;
93 /// List of initiated writes on the last cycle.
94 std::vector<MemoryAccess> writes_;
95 /// List of initiated reads.
96 std::vector<MemoryAccess> newReads_;
97 /// List of initiated writes.
98 std::vector<MemoryAccess> newWrites_;
99
100};
101
102#endif
unsigned long ULongWord
Definition BaseType.hh:51
Memory * memory_
Wrapped memory.
MemoryProxy & operator=(const MemoryProxy &)
Assignment not allowed.
std::pair< Word, int > MemoryAccess
virtual Memory::MAU read(ULongWord address) override
virtual void advanceClock()
MemoryProxy(const MemoryProxy &)
Copying not allowed.
virtual void reset()
std::vector< MemoryAccess > newReads_
List of initiated reads.
virtual void write(ULongWord address, MAU data) override
MemoryAccess writeAccess(unsigned int idx) const
unsigned int readAccessCount() const
SimulatorFrontend & frontend_
unsigned int writeAccessCount() const
virtual void fillWithZeros()
std::vector< MemoryAccess > writes_
List of initiated writes on the last cycle.
std::vector< MemoryAccess > reads_
List of initiated reads on the last cycle.
virtual void read(ULongWord address, int size, ULongWord &data)
virtual void write(ULongWord address, int size, ULongWord data)
virtual ~MemoryProxy()
MemoryAccess readAccess(unsigned int idx) const
std::vector< MemoryAccess > newWrites_
List of initiated writes.
virtual void write(ULongWord address, MAU data)=0
Definition Memory.cc:95
virtual void fillWithZeros()
Definition Memory.cc:704
MinimumAddressableUnit MAU
Definition Memory.hh:76