OpenASIP 2.2
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Public Member Functions | Private Attributes | List of all members
HDLGenerator::DefaultAssign Class Reference

#include <HDLGenerator.hh>

Inheritance diagram for HDLGenerator::DefaultAssign:
Inheritance graph
Collaboration diagram for HDLGenerator::DefaultAssign:
Collaboration graph

Public Member Functions

 DefaultAssign (std::string name, std::string value)
 
 DefaultAssign (std::string name)
 
void hdl (std::ostream &stream, Language lang, int level) override
 
- Public Member Functions inherited from HDLGenerator::SequentialStatement
 SequentialStatement (std::string name)
 
- Public Member Functions inherited from HDLGenerator::Generatable
 Generatable (std::string name)
 
virtual ~Generatable ()=default
 
virtual void build ()
 
virtual void reads (const std::string &var)
 
virtual void reads (const LHSValue &var)
 
virtual void writes (const std::string &var)
 
virtual RegistergetRegister (const std::string &var)
 
virtual bool hasOption (const std::string &var)
 
virtual bool isRegister (const std::string &name)
 
virtual bool isVariable (const std::string &name)
 
virtual bool isConstant (const std::string &name)
 
virtual Width width (const std::string &name)
 
int integerWidth (const std::string &name)
 
virtual WireType wireType (const std::string &name)
 
virtual Width width ()
 
virtual WireType wireType () const
 
virtual void hdl (std::ostream &stream, Language lang)
 
virtual void implementAll (std::ostream &stream, Language lang)
 
virtual void implementAll (std::ostream &stream, Language lang, int indent)
 
template<typename Func >
void forAll (Func func)
 
template<typename Type , typename Func >
void forAll (Func func)
 
template<class Type >
bool parentIs ()
 
template<class Type >
Type * parentType ()
 
void pushComponent (std::shared_ptr< Generatable > c)
 
template<class Component >
void addComponent (Component c)
 
const std::string & name () const noexcept
 
void setParent (Generatable *parent) noexcept
 
Generatableparent () const noexcept
 

Private Attributes

std::string value_
 
bool dontCare_
 

Detailed Description

Assign default value.

Definition at line 367 of file HDLGenerator.hh.

Constructor & Destructor Documentation

◆ DefaultAssign() [1/2]

HDLGenerator::DefaultAssign::DefaultAssign ( std::string  name,
std::string  value 
)
inline

Definition at line 369 of file HDLGenerator.hh.

370 : SequentialStatement(name), value_(value), dontCare_(false) {}
const std::string & name() const noexcept

◆ DefaultAssign() [2/2]

HDLGenerator::DefaultAssign::DefaultAssign ( std::string  name)
inline

Definition at line 371 of file HDLGenerator.hh.

372 : SequentialStatement(name), value_(""), dontCare_(true) {}

Member Function Documentation

◆ hdl()

void HDLGenerator::DefaultAssign::hdl ( std::ostream &  stream,
Language  lang,
int  level 
)
inlineoverridevirtual

Reimplemented from HDLGenerator::SequentialStatement.

Definition at line 374 of file HDLGenerator.hh.

374 {
375 Width w = width(name());
376 WireType t = wireType(name());
377
378
379 if (lang == Language::VHDL) {
380 std::string def = "-";
381 if (!dontCare_)
382 def = value_.substr(0, 1);
383
384 std::string assign = " <= ";
385 if (isVariable(name())) {
386 assign = " := ";
387 }
388 stream << StringTools::indent(level) << name() << assign;
389
390 if (w.strWidth.empty() && w.intWidth == 1) {
391 char delim = t == WireType::Auto ? '\'' : '"';
392 stream << delim << def << delim << ";\n";
393 } else {
394 stream << "(others => '" << def << "');\n";
395 }
396 } else if (lang == Language::Verilog) {
397 std::string def = "x";
398 if (!dontCare_)
399 def = value_.substr(0, 1);
400
401 stream << StringTools::indent(level)
402 << name() << " = 'b" << def << ";\n";
403 } else {
404 throw std::runtime_error(__PRETTY_FUNCTION__);
405 }
406 }
virtual WireType wireType() const
virtual bool isVariable(const std::string &name)
static std::string indent(int level)

References HDLGenerator::Auto, dontCare_, StringTools::indent(), HDLGenerator::Width::intWidth, HDLGenerator::Generatable::isVariable(), HDLGenerator::Generatable::name(), HDLGenerator::Width::strWidth, value_, HDLGenerator::Verilog, HDLGenerator::VHDL, HDLGenerator::Generatable::width(), and HDLGenerator::Generatable::wireType().

Here is the call graph for this function:

Member Data Documentation

◆ dontCare_

bool HDLGenerator::DefaultAssign::dontCare_
private

Definition at line 410 of file HDLGenerator.hh.

Referenced by hdl().

◆ value_

std::string HDLGenerator::DefaultAssign::value_
private

Definition at line 409 of file HDLGenerator.hh.

Referenced by hdl().


The documentation for this class was generated from the following file: