HDLGenerator::Port Class Reference

#include <HDLPort.hh>

Inheritance diagram for HDLGenerator::Port:

Collaboration diagram for HDLGenerator::Port:

Public Member Functions
	Port (std::string name, Direction dir, int width=1, WireType wireType=WireType::Auto)
	Port (std::string name, Direction dir, std::string parametricWidth, WireType wireType=WireType::Auto)
virtual	~Port ()=default
void	declare (std::ostream &stream, Language lang, int level=0)
std::string	name ()
Width	width ()
WireType	wireType () const

Protected Attributes
std::string	name_
Direction	dir_
std::string	parametricWidth_
int	width_
WireType	wireType_

Detailed Description

Entity/module port base class.

Definition at line 38 of file HWGen/HDLPort.hh.

Constructor & Destructor Documentation

Port() [1/2]

HDLGenerator::Port::Port ( std::string  name, Direction  dir, int  width = 1, WireType  wireType = WireType::Auto  )

inline

Definition at line 40 of file HWGen/HDLPort.hh.

            : name_(name), dir_(dir), width_(width), wireType_(wireType) {}

Port() [2/2]

HDLGenerator::Port::Port ( std::string  name, Direction  dir, std::string  parametricWidth, WireType  wireType = WireType::Auto  )

inline

Definition at line 43 of file HWGen/HDLPort.hh.

            : name_(name), dir_(dir), parametricWidth_(parametricWidth),
              width_(-1), wireType_(wireType) {}

~Port()

virtual HDLGenerator::Port::~Port ( )

virtualdefault

Member Function Documentation

declare()

void HDLGenerator::Port::declare ( std::ostream &  stream, Language  lang, int  level = 0  )

inline

Definition at line 50 of file HWGen/HDLPort.hh.

                                                                       {
            stream << StringTools::indent(level);
            if (lang == Language::VHDL) {
                stream << name_;
                if (dir_ == Direction::In) {
                    stream << " : in ";
                } else {
                    stream << " : out ";
                }
                if (!parametricWidth_.empty()) {
                    stream << "std_logic_vector(" << parametricWidth_
                           << "-1 downto 0)";
                } else if (wireType_ == WireType::Vector || width_ > 1) {
                    stream << "std_logic_vector("
                           << std::to_string(width_) << "-1 downto 0)";
                } else {
                    stream << "std_logic";
                }
            } else if (lang == Language::Verilog) {
                if (dir_ == Direction::In) {
                    stream << "input ";
                } else {
                    stream << "output reg ";
                }
                if (!parametricWidth_.empty()) {
                    stream << "[" << parametricWidth_ << "-1:0] ";
                } else if (wireType_ == WireType::Vector || width_ > 1) {
                    stream << "[" << std::to_string(width_ - 1) << ":0] ";
                }
                stream << name_;
            } else {
                throw std::runtime_error(__PRETTY_FUNCTION__);
            }
        };

References dir_, HDLGenerator::In, StringTools::indent(), name_, parametricWidth_, HDLGenerator::Vector, HDLGenerator::Verilog, HDLGenerator::VHDL, width_, and wireType_.

Here is the call graph for this function:

name()

std::string HDLGenerator::Port::name ( )

inline

Definition at line 85 of file HWGen/HDLPort.hh.

{ return name_; }

References name_.

width()

Width HDLGenerator::Port::width ( )

inline

Definition at line 87 of file HWGen/HDLPort.hh.

{ return {parametricWidth_, width_}; }

References parametricWidth_, and width_.

wireType()

WireType HDLGenerator::Port::wireType ( ) const

inline

Definition at line 89 of file HWGen/HDLPort.hh.

{ return wireType_; }

References wireType_.

Member Data Documentation

dir_

Direction HDLGenerator::Port::dir_

protected

Definition at line 93 of file HWGen/HDLPort.hh.

Referenced by declare().

name_

std::string HDLGenerator::Port::name_

protected

Definition at line 92 of file HWGen/HDLPort.hh.

Referenced by declare(), and name().

parametricWidth_

std::string HDLGenerator::Port::parametricWidth_

protected

Definition at line 94 of file HWGen/HDLPort.hh.

Referenced by declare(), and width().

width_

int HDLGenerator::Port::width_

protected

Definition at line 95 of file HWGen/HDLPort.hh.

Referenced by declare(), and width().

wireType_

WireType HDLGenerator::Port::wireType_

protected

Definition at line 96 of file HWGen/HDLPort.hh.

Referenced by declare(), and wireType().

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The documentation for this class was generated from the following file:

• HWGen/HDLPort.hh