OpenASIP  2.0
Public Member Functions | Private Attributes | List of all members
HDLGenerator::Switch Class Reference

#include <HDLGenerator.hh>

Inheritance diagram for HDLGenerator::Switch:
Inheritance graph
Collaboration diagram for HDLGenerator::Switch:
Collaboration graph

Public Member Functions

 Switch (LHSValue control)
 
void addCase (Case rhs)
 
void addCase (DefaultCase rhs)
 
void build () override
 
void hdl (std::ostream &stream, Language lang, int level) override
 
- Public Member Functions inherited from HDLGenerator::SequentialStatement
 SequentialStatement (std::string name)
 
- Public Member Functions inherited from HDLGenerator::Generatable
 Generatable (std::string name)
 
virtual ~Generatable ()=default
 
virtual void reads (const std::string &var)
 
virtual void reads (const LHSValue &var)
 
virtual void writes (const std::string &var)
 
virtual RegistergetRegister (const std::string &var)
 
virtual bool hasOption (const std::string &var)
 
virtual bool isRegister (const std::string &name)
 
virtual bool isVariable (const std::string &name)
 
virtual bool isConstant (const std::string &name)
 
virtual Width width (const std::string &name)
 
int integerWidth (const std::string &name)
 
virtual WireType wireType (const std::string &name)
 
virtual Width width ()
 
virtual WireType wireType () const
 
virtual void hdl (std::ostream &stream, Language lang)
 
virtual void implementAll (std::ostream &stream, Language lang)
 
virtual void implementAll (std::ostream &stream, Language lang, int indent)
 
template<typename Func >
void forAll (Func func)
 
template<typename Type , typename Func >
void forAll (Func func)
 
template<class Type >
bool parentIs ()
 
template<class Type >
Type * parentType ()
 
void pushComponent (std::shared_ptr< Generatable > c)
 
template<class Component >
void addComponent (Component c)
 
const std::string & name () const noexcept
 
void setParent (Generatable *parent) noexcept
 
Generatableparent () const noexcept
 

Private Attributes

LHSValue control_
 

Detailed Description

Switch-case switch.

Definition at line 743 of file HDLGenerator.hh.

Constructor & Destructor Documentation

◆ Switch()

HDLGenerator::Switch::Switch ( LHSValue  control)
inline

Definition at line 745 of file HDLGenerator.hh.

745  : SequentialStatement("switch"),
746  control_(control) {}

Member Function Documentation

◆ addCase() [1/2]

void HDLGenerator::Switch::addCase ( Case  rhs)
inline

Definition at line 748 of file HDLGenerator.hh.

748  {
749  addComponent(rhs);
750  }

References HDLGenerator::Generatable::addComponent().

Referenced by FUGen::buildOperations().

Here is the call graph for this function:

◆ addCase() [2/2]

void HDLGenerator::Switch::addCase ( DefaultCase  rhs)
inline

Definition at line 752 of file HDLGenerator.hh.

752  {
753  addComponent(rhs);
754  }

References HDLGenerator::Generatable::addComponent().

Here is the call graph for this function:

◆ build()

void HDLGenerator::Switch::build ( )
inlineoverridevirtual

Reimplemented from HDLGenerator::Generatable.

Definition at line 756 of file HDLGenerator.hh.

756  {
758  reads(control_);
759  }

References HDLGenerator::Generatable::build(), control_, and HDLGenerator::Generatable::reads().

Here is the call graph for this function:

◆ hdl()

void HDLGenerator::Switch::hdl ( std::ostream &  stream,
Language  lang,
int  level 
)
inlineoverridevirtual

Reimplemented from HDLGenerator::SequentialStatement.

Definition at line 761 of file HDLGenerator.hh.

761  {
762  if (lang == Language::VHDL) {
763  stream << StringTools::indent(level) << "case ";
764  control_.hdl(stream, lang);
765  stream << " is\n";
766  implementAll(stream, lang, level + 1);
767  stream << StringTools::indent(level) << "end case;\n";
768  } else if (lang == Language::Verilog) {
769  stream << StringTools::indent(level) << "case (";
770  control_.hdl(stream, lang);
771  stream << ")\n";
772  implementAll(stream, lang, level + 1);
773  stream << StringTools::indent(level) << "endcase\n";
774  } else {
775  throw std::runtime_error(__PRETTY_FUNCTION__);
776  }
777  }

References control_, HDLGenerator::LHSValue::hdl(), HDLGenerator::Generatable::implementAll(), StringTools::indent(), HDLGenerator::Verilog, and HDLGenerator::VHDL.

Here is the call graph for this function:

Member Data Documentation

◆ control_

LHSValue HDLGenerator::Switch::control_
private

Definition at line 780 of file HDLGenerator.hh.

Referenced by build(), and hdl().


The documentation for this class was generated from the following file:
HDLGenerator::Switch::control_
LHSValue control_
Definition: HDLGenerator.hh:780
StringTools::indent
static std::string indent(int level)
Definition: StringTools.cc:319
HDLGenerator::Generatable::addComponent
void addComponent(Component c)
Definition: Generatable.hh:235
HDLGenerator::Language::Verilog
@ Verilog
HDLGenerator::SequentialStatement::SequentialStatement
SequentialStatement(std::string name)
Definition: HDLGenerator.hh:123
HDLGenerator::Generatable::build
virtual void build()
Definition: Generatable.hh:56
HDLGenerator::Generatable::implementAll
virtual void implementAll(std::ostream &stream, Language lang)
Definition: Generatable.hh:183
HDLGenerator::Generatable::reads
virtual void reads(const std::string &var)
Definition: Generatable.hh:63
HDLGenerator::LHSValue::hdl
void hdl(std::ostream &stream, Language lang, int level)
Definition: LHSValue.cc:37
HDLGenerator::Language::VHDL
@ VHDL