HDLGenerator::Synchronous Class Reference

#include <HDLGenerator.hh>

Inheritance diagram for HDLGenerator::Synchronous:

Collaboration diagram for HDLGenerator::Synchronous:

Public Member Functions
	Synchronous (std::string name)
template<typename SS >
Synchronous &	operator<< (SS op)
template<typename Var >
void	addVariable (Var op)
virtual void	build () override
virtual void	writes (const std::string &var) override
virtual void	vhdlReset (std::ostream &stream, Language lang, int level)
virtual void	hdl (std::ostream &stream, Language lang, int level) override
Public Member Functions inherited from HDLGenerator::Generatable
	Generatable (std::string name)
virtual	~Generatable ()=default
virtual void	reads (const std::string &var)
virtual void	reads (const LHSValue &var)
virtual Register &	getRegister (const std::string &var)
virtual bool	hasOption (const std::string &var)
virtual bool	isRegister (const std::string &name)
virtual bool	isVariable (const std::string &name)
virtual bool	isConstant (const std::string &name)
virtual Width	width (const std::string &name)
int	integerWidth (const std::string &name)
virtual WireType	wireType (const std::string &name)
virtual Width	width ()
virtual WireType	wireType () const
virtual void	hdl (std::ostream &stream, Language lang)
virtual void	implementAll (std::ostream &stream, Language lang)
virtual void	implementAll (std::ostream &stream, Language lang, int indent)
template<typename Func >
void	forAll (Func func)
template<typename Type , typename Func >
void	forAll (Func func)
template<class Type >
bool	parentIs ()
template<class Type >
Type *	parentType ()
void	pushComponent (std::shared_ptr< Generatable > c)
template<class Component >
void	addComponent (Component c)
const std::string &	name () const noexcept
void	setParent (Generatable *parent) noexcept
Generatable *	parent () const noexcept

Private Attributes
std::vector< std::shared_ptr< Variable > >	variables_
std::unordered_set< std::string >	registers_

Detailed Description

Sync process/always.

Definition at line 983 of file HDLGenerator.hh.

Constructor & Destructor Documentation

Synchronous()

HDLGenerator::Synchronous::Synchronous ( std::string  name )

inline

Definition at line 985 of file HDLGenerator.hh.

: Generatable(name) {}

Member Function Documentation

addVariable()

template<typename Var >

void HDLGenerator::Synchronous::addVariable ( Var  op )

inline

Definition at line 995 of file HDLGenerator.hh.

                                 {
            std::shared_ptr<Variable> ptr = std::make_shared<Var>(op);
            variables_.push_back(op);
        }

References variables_.

build()

void HDLGenerator::Synchronous::build ( )

overridevirtual

Reimplemented from HDLGenerator::Generatable.

Definition at line 33 of file HDLGenerator.cc.

                   {
    Generatable::build();
    for (auto&& v : variables_) {
        parentType<Module>()->registerVariable(v);
    }
    for (auto&& r : registers_) {
        if (!isRegister(r)) {
            throw std::runtime_error(
                r + " written in synchronous but isn't a register.");
        }
    }
}

References HDLGenerator::Generatable::build(), HDLGenerator::Generatable::isRegister(), registers_, and variables_.

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hdl()

virtual void HDLGenerator::Synchronous::hdl ( std::ostream &  stream, Language  lang, int  level  )

inlineoverridevirtual

Reimplemented from HDLGenerator::Generatable.

Definition at line 1030 of file HDLGenerator.hh.

                                                                   {
            if (lang == Language::VHDL) {
                stream << "\n"
                       << StringTools::indent(level) << name() << " : process";
                if (hasOption("asynchronous reset")) {
                    stream << "(clk, rstx)\n";
                } else {
                    stream << "(clk)\n";
                }
 
                for (auto&& v : variables_) {
                    v->declare(stream, lang, level + 1);
                }
 
                stream << StringTools::indent(level) << "begin\n";
                if (hasOption("asynchronous reset")) {
                    vhdlReset(stream, lang, level + 1);
                    stream << StringTools::indent(level + 1)
                           << "elsif clk = '1' and clk'event then\n";
                    implementAll(stream, lang, level + 2);
                } else {
                    stream << StringTools::indent(level + 1)
                           << "if clk = '1' and clk'event then\n";
                    vhdlReset(stream, lang, level + 2);
                    stream << StringTools::indent(level + 2) << "else\n";
                    implementAll(stream, lang, level + 3);
                    stream << StringTools::indent(level + 2) << "end if;\n";
                }
                stream << StringTools::indent(level + 1) << "end if;\n";
                stream << StringTools::indent(level)
                       << "end process " << name() << ";\n";
            } else if (lang == Language::Verilog) {
                stream << "\n";
                stream << StringTools::indent(level) << "// " << name() << "\n";
                if (hasOption("asynchronous reset")) {
                    stream << StringTools::indent(level)
                           << "always @(posedge clk or negedge rstx) begin\n";
                } else {
                    stream << StringTools::indent(level)
                           << "always @(posedge clk) begin\n";
                }
                stream << StringTools::indent(level + 1)
                       << "if (~rstx) begin\n";
                for (auto&& r : registers_) {
                    Register& reg = getRegister(r);
                    if (reg.resetOption() == ResetOption::Mandatory ||
                        hasOption("reset everything")) {
                        reg.reset(stream, lang, level + 2);
                    }
                }
                stream << StringTools::indent(level + 1) << "end else begin\n";
                implementAll(stream, lang, level + 2);
                stream << StringTools::indent(level + 1) << "end\n";
                stream << StringTools::indent(level) << "end\n";
            } else {
                throw std::runtime_error(__PRETTY_FUNCTION__);
            }
        }

References HDLGenerator::Generatable::getRegister(), HDLGenerator::Generatable::hasOption(), HDLGenerator::Generatable::implementAll(), StringTools::indent(), HDLGenerator::Mandatory, HDLGenerator::Generatable::name(), registers_, HDLGenerator::Register::reset(), HDLGenerator::Register::resetOption(), variables_, HDLGenerator::Verilog, HDLGenerator::VHDL, and vhdlReset().

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operator<<()

template<typename SS >

Synchronous & HDLGenerator::Synchronous::operator<< ( SS  op )

inline

Definition at line 988 of file HDLGenerator.hh.

                                       {
            std::shared_ptr<SequentialStatement> ptr = std::make_shared<SS>(op);
            pushComponent(ptr);
            return *this;
        }

References HDLGenerator::Generatable::pushComponent().

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vhdlReset()

virtual void HDLGenerator::Synchronous::vhdlReset ( std::ostream &  stream, Language  lang, int  level  )

inlinevirtual

Definition at line 1014 of file HDLGenerator.hh.

                                                                             {
            if (hasOption("active low reset"))
                stream << StringTools::indent(level) << "if rstx = '0' then\n";
            if (hasOption("active high reset"))
                stream << StringTools::indent(level) << "if rst = '1' then\n";
            for (auto&& r : registers_) {
                Register& reg = getRegister(r);
                if (reg.resetOption() == ResetOption::Mandatory ||
                    hasOption("reset everything")) {
                    reg.reset(stream, lang, level + 1);
                }
            }
            // Leaves if clause open for else/elsif
        }

References HDLGenerator::Generatable::getRegister(), HDLGenerator::Generatable::hasOption(), StringTools::indent(), HDLGenerator::Mandatory, registers_, HDLGenerator::Register::reset(), and HDLGenerator::Register::resetOption().

Referenced by hdl().

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writes()

virtual void HDLGenerator::Synchronous::writes ( const std::string &  var )

inlineoverridevirtual

Reimplemented from HDLGenerator::Generatable.

Definition at line 1002 of file HDLGenerator.hh.

                                                           {
            //Generatable::writes(var);
            if (isVariable(var)) {
                return;
            }
            if (!isRegister(var)) {
                std::cerr << "Trying to write nonregister " << var << "\n";
                throw std::runtime_error(__PRETTY_FUNCTION__);
            }
            registers_.emplace(var);
        }

References HDLGenerator::Generatable::isRegister(), HDLGenerator::Generatable::isVariable(), and registers_.

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Member Data Documentation

registers_

std::unordered_set<std::string> HDLGenerator::Synchronous::registers_

private

Definition at line 1091 of file HDLGenerator.hh.

Referenced by build(), hdl(), vhdlReset(), and writes().

variables_

std::vector< std::shared_ptr<Variable> > HDLGenerator::Synchronous::variables_

private

Definition at line 1090 of file HDLGenerator.hh.

Referenced by addVariable(), build(), and hdl().

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The documentation for this class was generated from the following files:

• HDLGenerator.hh
• HDLGenerator.cc