#include <Netlist.hh>

Inheritance diagram for ProGe::Netlist:

Collaboration diagram for ProGe::Netlist:

Public Types
typedef boost::graph_traits< Netlist >::edge_iterator	iterator

typedef boost::graph_traits< constNetlist >::edge_iterator	const_iterator

typedef DescriptorMap::iterator	descriptor_iterator

typedef DescriptorMap::const_iterator	const_descriptor_iterator

Public Member Functions
	Netlist ()

virtual	~Netlist ()

bool	connect (const NetlistPort &port1, const NetlistPort &port2, int port1FirstBit, int port2FirstBit, int width=1)

bool	connect (const NetlistPort &port1, const NetlistPort &port2)

bool	connect (const NetlistPortGroup &group1, const NetlistPortGroup &group2)

bool	connectBy (SignalType byType, const NetlistPortGroup &group1, const NetlistPortGroup &group2)

bool	connect (const NetlistPortGroup &group1, const NetlistPortGroup &group2, std::map< SignalType, SignalType > connectionMap)

bool	connectGroupByName (const NetlistPortGroup &group1, const NetlistPortGroup &group2)

void	disconnectPorts (const NetlistPort &port1, const NetlistPort &port2)

bool	isPortConnected (const NetlistPort &port) const

bool	isEmpty () const

bool	hasConnections () const

size_t	registerPort (NetlistPort &port)

size_t	descriptor (const NetlistPort &port) const

bool	isRegistered (const NetlistPort &port) const

void	unregisterPort (NetlistPort &port)

void	setParameter (const std::string &name, const std::string &type, const std::string &value)

void	setParameter (const Parameter &param)

void	removeParameter (const std::string &name)

bool	hasParameter (const std::string &name) const

size_t	parameterCount () const

Parameter	parameter (size_t index) const

iterator	begin ()

iterator	end ()

const_iterator	begin () const

const_iterator	end () const

descriptor_iterator	descriptorBegin ()

descriptor_iterator	descriptorEnd ()

const_descriptor_iterator	descriptorBegin () const

const_descriptor_iterator	descriptorEnd () const

Static Public Member Functions
static void	connectClocks (NetlistBlock &block)

static void	connectResets (NetlistBlock &block)

Private Types
typedef std::map< const NetlistPort *, size_t >	DescriptorMap
	Map type for vertex descriptors.

typedef std::vector< Parameter >	ParameterTable
	Vector type for parameters.

Private Attributes
DescriptorMap	vertexDescriptorMap_
	Vertex descriptor map.

ParameterTable	parameters_
	Parameters of the netlist.

TCEString	coreEntityName_
	This should be set to the entity name of the generate core, if it's not the same as the toplevel module name.

Static Private Attributes
static const std::string	INVERTER_MODULE

static const std::string	INVERTER_INPUT

static const std::string	INVERTER_OUTPUT

Detailed Description

Represents a netlist of port connections.

Definition at line 63 of file Netlist.hh.

Member Typedef Documentation

◆ const_descriptor_iterator

typedef DescriptorMap::const_iterator ProGe::Netlist::const_descriptor_iterator

Definition at line 133 of file Netlist.hh.

◆ const_iterator

typedef boost::graph_traits<constNetlist>::edge_iterator ProGe::Netlist::const_iterator

Definition at line 126 of file Netlist.hh.

◆ descriptor_iterator

typedef DescriptorMap::iterator ProGe::Netlist::descriptor_iterator

Definition at line 132 of file Netlist.hh.

◆ DescriptorMap

typedef std::map<const NetlistPort*, size_t> ProGe::Netlist::DescriptorMap

private

Map type for vertex descriptors.

Definition at line 68 of file Netlist.hh.

◆ iterator

typedef boost::graph_traits<Netlist>::edge_iterator ProGe::Netlist::iterator

Definition at line 125 of file Netlist.hh.

◆ ParameterTable

typedef std::vector<Parameter> ProGe::Netlist::ParameterTable

private

Vector type for parameters.

Definition at line 143 of file Netlist.hh.

Constructor & Destructor Documentation

◆ Netlist()

ProGe::Netlist::Netlist ( )

The constructor.

Definition at line 56 of file Netlist.cc.

56 : coreEntityName_("") {

57}

ProGe::Netlist::coreEntityName_

TCEString coreEntityName_

This should be set to the entity name of the generate core, if it's not the same as the toplevel modu...

Definition Netlist.hh:152

◆ ~Netlist()

ProGe::Netlist::~Netlist ( )

virtual

The destructor.

Definition at line 63 of file Netlist.cc.

63 {

64}

Member Function Documentation

◆ begin() [1/2]

Netlist::iterator ProGe::Netlist::begin ( )

Definition at line 443 of file Netlist.cc.

               {
    return boost::edges(*this).first;
}

Referenced by ProGe::NetlistVisualization::listConnections().

◆ begin() [2/2]

Netlist::const_iterator ProGe::Netlist::begin ( ) const

Definition at line 453 of file Netlist.cc.

                     {
    return boost::edges(*this).first;
}

◆ connect() [1/4]

bool ProGe::Netlist::connect	(	const NetlistPort &	port1,
		const NetlistPort &	port2
	)

Connects two netlist ports completely.

Each bit of the first port is connected to a bit of the second port. The bits are connected in the same order (the first bit of the first port is connected to the first bit of the second port).

Parameters

port1	The first port to connect.
port2	The second port to connect.
Return	true, if connection was successful.

Definition at line 117 of file Netlist.cc.

                                                                   {
    size_t port1Descriptor = descriptor(port1);
    size_t port2Descriptor = descriptor(port2);
    bool needsInversion = port1.assignedSignal().activeState() !=
                          port2.assignedSignal().activeState();
    PortConnectionProperty property(needsInversion);
 
    // create first edge
    boost::add_edge(port1Descriptor, port2Descriptor, property, *this);
    // create the opposite edge
    boost::add_edge(port2Descriptor, port1Descriptor, property, *this);
    return true;
}

References ProGe::Signal::activeState(), ProGe::NetlistPort::assignedSignal(), and descriptor().

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◆ connect() [2/4]

bool ProGe::Netlist::connect	(	const NetlistPort &	port1,
		const NetlistPort &	port2,
		int	port1FirstBit,
		int	port2FirstBit,
		int	width = `1`
	)

Partially connects two netlist ports.

Connects two given subsets of bits of two netlist ports. The bit subsets have equal cardinality and represent an ordered range of adjacent bits. The bits are connected in the same order (the first bit of the subset of the first port is connected to the first bit of the subset of the second port).

Parameters

port1	The first port to connect.
port2	The second port to connect.
port1FirstBit	The first bit of the first port to connect.
port2FirstBit	The first bit of the second port to connect.
width	The width of the connection.
Return	true, if connection was successful.

Definition at line 83 of file Netlist.cc.

                                  {
    // PortConnectionProperty regards width 0 as fully connected
    if (width == 0 && (port1.dataType() != port2.dataType())) {
        // BIT to/from BIT_VECTOR connection needs partial connectivity
        width = 1;
    }
 
    size_t port1Descriptor = descriptor(port1);
    size_t port2Descriptor = descriptor(port2);
 
    // create first edge
    PortConnectionProperty property1(port1FirstBit, port2FirstBit, width);
    boost::add_edge(port1Descriptor, port2Descriptor, property1, *this);
 
    // create the opposite edge
    PortConnectionProperty property2(port2FirstBit, port1FirstBit, width);
    boost::add_edge(port2Descriptor, port1Descriptor, property2, *this);
    return true;
}

References ProGe::NetlistPort::dataType(), and descriptor().

Referenced by ProGe::NetlistGenerator::addBaseRFToNetlist(), ProGe::NetlistGenerator::addFUExternalPortsToNetlist(), ProGe::NetlistGenerator::addFUToNetlist(), ProGe::NetlistGenerator::addGCUToNetlist(), ProGe::NetlistGenerator::addGeneratableFUsToNetlist(), DefaultDecoderGenerator::addGlockPortToDecoder(), DefaultICGenerator::addICToNetlist(), ProGe::ProcessorWrapperBlock::addInstructionMemory(), DefaultDecoderGenerator::addLockReqPortToDecoder(), XilinxBlockRamGenerator::addMemory(), DefaultICDecoderGenerator::addRV32MicroCode(), DefaultDecoderGenerator::completeDecoderBlock(), connect(), connect(), connectBy(), ProGe::BaseNetlistBlock::connectClocks(), connectClocks(), connectGroupByName(), AlteraHibiDpRamGenerator::connectPorts(), MemoryGenerator::connectPorts(), ProGe::BaseNetlistBlock::connectResets(), connectResets(), PlatformIntegrator::connectToplevelPort(), FUGen::createExternalInterfaces(), DefaultICDecoderGenerator::generateDebuggerCode(), AlmaIFIntegrator::initAlmaifBlock(), AlmaIFIntegrator::integrateCore(), and PlatformIntegrator::integrateCore().

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◆ connect() [3/4]

bool ProGe::Netlist::connect	(	const NetlistPortGroup &	group1,
		const NetlistPortGroup &	group2
	)

Trivially connect ports of the groups together by their signal types.

Parameters

Return true, if connection was successful.

Definition at line 149 of file Netlist.cc.

                                                                    {
    if (group1.portCount() != group2.portCount()) {
        return false;
    }
 
    std::map<SignalType, const NetlistPort*> portsOfGroup2;
    for (const NetlistPort* port : group2) {
        assert(
            !AssocTools::containsKey(
                portsOfGroup2, port->assignedSignal().type()) &&
            "Netlist::Connect(): Currently cannot handle groups with "
            "multiply of same signal type");
        portsOfGroup2.insert(
            std::make_pair(port->assignedSignal().type(), port));
    }
 
    for (const NetlistPort* from : group1) {
        SignalType matchingType = from->assignedSignal().type();
        assert(AssocTools::containsKey(portsOfGroup2, matchingType) && "");
        const NetlistPort* to = portsOfGroup2.at(matchingType);
        connect(*from, *to);
    }
 
    return true;
}

References assert, connect(), AssocTools::containsKey(), and ProGe::NetlistPortGroup::portCount().

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◆ connect() [4/4]

bool ProGe::Netlist::connect	(	const NetlistPortGroup &	group1,
		const NetlistPortGroup &	group2,
		std::map< SignalType, SignalType >	connectionMap
	)

Makes connection between two different netlist port group by connection map using their SignalTypes.

The connections are made from the first group to the second group by using the connection map. todo...

Parameters

group1	The first port group.
group2	The second port group.
connectionMap	The connection rules.

Definition at line 209 of file Netlist.cc.

                                                  {
    for (const NetlistPort* port1 : group1) {
        SignalType type1 = port1->assignedSignal().type();
        SignalType type2 = SignalType::UNDEFINED;
        if (connectionMap.count(type1)) {
            type2 = connectionMap.at(type1);
        } else {
            continue;
        }
        if (type2 == SignalType::OPEN) {
            continue;
        }
        const NetlistPort& port2 = group2.portBySignal(type2);
 
        connect(*port1, port2);
    }
 
    return true;
}

References connect(), ProGe::OPEN, ProGe::NetlistPortGroup::portBySignal(), and ProGe::UNDEFINED.

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◆ connectBy()

bool ProGe::Netlist::connectBy	(	SignalType	byType,
		const NetlistPortGroup &	group1,
		const NetlistPortGroup &	group2
	)

Make single port connection by given signal type.

Signal type is assumed to be unique within the both port groups.

Definition at line 182 of file Netlist.cc.

                                    {
    assert(group1.hasPortBySignal(byType));
    assert(group2.hasPortBySignal(byType));
 
    const NetlistPort& port1 = group1.portBySignal(byType);
    const NetlistPort& port2 = group2.portBySignal(byType);
 
    connect(port1, port2);
 
    return true;
}

References assert, connect(), ProGe::NetlistPortGroup::hasPortBySignal(), and ProGe::NetlistPortGroup::portBySignal().

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◆ connectClocks()

void ProGe::Netlist::connectClocks ( NetlistBlock & block )

static

Definition at line 483 of file Netlist.cc.

                                          {
    const NetlistPort* topClock = nullptr;
    {
        std::vector<const NetlistPort*> clockOfBlock;
        clockOfBlock = block.portsBy(SignalType::CLOCK);
        assert(clockOfBlock.size() < 2);
        if (clockOfBlock.empty()) {
            return;
        } else {
            topClock = clockOfBlock.at(0);
        }
    }
 
    for (size_t i = 0; i < block.subBlockCount(); i++) {
        std::vector<const NetlistPort*> clockOfSubBlock;
        const BaseNetlistBlock& cblock = block;
        clockOfSubBlock = cblock.subBlock(i).portsBy(SignalType::CLOCK);
        assert(clockOfSubBlock.size() < 2);
        if (clockOfSubBlock.empty() ||
            block.netlist().isPortConnected(*clockOfSubBlock.at(0))) {
            continue;
        } else {
            block.netlist().connect(*topClock, *clockOfSubBlock.at(0));
        }
    }
}

References assert, ProGe::CLOCK, connect(), isPortConnected(), ProGe::NetlistBlock::netlist(), ProGe::BaseNetlistBlock::portsBy(), ProGe::BaseNetlistBlock::subBlock(), and ProGe::NetlistBlock::subBlockCount().

Referenced by ProGe::NetlistGenerator::addGCUToNetlist().

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◆ connectGroupByName()

bool ProGe::Netlist::connectGroupByName	(	const NetlistPortGroup &	group1,
		const NetlistPortGroup &	group2
	)

Trivially connect ports of the groups together by their port names. Useful for exporting e.g. bus connections to higher-level netlist block

Parameters

Return true, if connection was successful.

Definition at line 238 of file Netlist.cc.

                                                                    {
    if (group1.portCount() != group2.portCount()) {
        return false;
    }
 
    std::map<std::string, const NetlistPort*> portsOfGroup2;
    for (const NetlistPort* port : group2) {
        assert(
            !AssocTools::containsKey(portsOfGroup2, port->name()) &&
            "Netlist::Connect(): group2 has multiple ports "
            "with the same name");
        portsOfGroup2.insert(std::make_pair(port->name(), port));
    }
 
    for (const NetlistPort* from : group1) {
        std::string matchingName = from->name();
        assert(
            AssocTools::containsKey(portsOfGroup2, matchingName) &&
            "Netlist::connectByName: The two port groups' names "
            "do not match");
        const NetlistPort* to = portsOfGroup2.at(matchingName);
        connect(*from, *to);
    }
 
    return true;
}

References assert, connect(), AssocTools::containsKey(), and ProGe::NetlistPortGroup::portCount().

Referenced by AlmaIFIntegrator::initAlmaifBlock().

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◆ connectResets()

void ProGe::Netlist::connectResets ( NetlistBlock & block )

static

Definition at line 511 of file Netlist.cc.

                                          {
    const NetlistPort* topClock = nullptr;
    {
        std::vector<const NetlistPort*> clockOfBlock;
        clockOfBlock = block.portsBy(SignalType::RESET);
        assert(clockOfBlock.size() < 2);
        if (clockOfBlock.empty()) {
            return;
        } else {
            topClock = clockOfBlock.at(0);
        }
    }
 
    for (size_t i = 0; i < block.subBlockCount(); i++) {
        std::vector<const NetlistPort*> clockOfSubBlock;
        const BaseNetlistBlock& cblock = block;
        clockOfSubBlock = cblock.subBlock(i).portsBy(SignalType::RESET);
        assert(clockOfSubBlock.size() < 2);
        if (clockOfSubBlock.empty() ||
            block.netlist().isPortConnected(*clockOfSubBlock.at(0))) {
            continue;
        } else {
            block.netlist().connect(*topClock, *clockOfSubBlock.at(0));
        }
    }
}

References assert, connect(), isPortConnected(), ProGe::NetlistBlock::netlist(), ProGe::BaseNetlistBlock::portsBy(), ProGe::RESET, ProGe::BaseNetlistBlock::subBlock(), and ProGe::NetlistBlock::subBlockCount().

Referenced by ProGe::NetlistGenerator::addGCUToNetlist().

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◆ descriptor()

size_t ProGe::Netlist::descriptor ( const NetlistPort & port ) const

Returns descriptor for the given port.

Returns: Descriptor for the given port.

Definition at line 325 of file Netlist.cc.

                                                 {
    assert(MapTools::containsKey(vertexDescriptorMap_, &port));
    return MapTools::valueForKey<size_t>(vertexDescriptorMap_, &port);
}

References assert, MapTools::containsKey(), MapTools::keyForValue(), and vertexDescriptorMap_.

Referenced by connect(), connect(), disconnectPorts(), isPortConnected(), registerPort(), unregisterPort(), ProGe::VerilogNetlistWriter::writePortMappings(), ProGe::VHDLNetlistWriter::writePortMappings(), ProGe::VerilogNetlistWriter::writeSignalAssignments(), ProGe::VHDLNetlistWriter::writeSignalAssignments(), ProGe::VerilogNetlistWriter::writeSignalDeclarations(), and ProGe::VHDLNetlistWriter::writeSignalDeclarations().

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◆ descriptorBegin() [1/2]

Netlist::descriptor_iterator ProGe::Netlist::descriptorBegin ( )

Definition at line 463 of file Netlist.cc.

                         {
    return vertexDescriptorMap_.begin();
}

References vertexDescriptorMap_.

Referenced by ProGe::NetlistVisualization::listNetlistDescriptors().

◆ descriptorBegin() [2/2]

Netlist::const_descriptor_iterator ProGe::Netlist::descriptorBegin ( ) const

Definition at line 473 of file Netlist.cc.

                               {
    return vertexDescriptorMap_.begin();
}

References vertexDescriptorMap_.

◆ descriptorEnd() [1/2]

Netlist::descriptor_iterator ProGe::Netlist::descriptorEnd ( )

Definition at line 468 of file Netlist.cc.

                       {
    return vertexDescriptorMap_.end();
}

References vertexDescriptorMap_.

Referenced by ProGe::NetlistVisualization::listNetlistDescriptors().

◆ descriptorEnd() [2/2]

Netlist::const_descriptor_iterator ProGe::Netlist::descriptorEnd ( ) const

Definition at line 478 of file Netlist.cc.

                             {
    return vertexDescriptorMap_.end();
}

References vertexDescriptorMap_.

◆ disconnectPorts()

void ProGe::Netlist::disconnectPorts	(	const NetlistPort &	port1,
		const NetlistPort &	port2
	)

Removes connection between two ports.

Definition at line 135 of file Netlist.cc.

                                                                           {
    size_t port1Descriptor = descriptor(port1);
    size_t port2Descriptor = descriptor(port2);
 
    boost::remove_edge(port1Descriptor, port2Descriptor, *this);
    boost::remove_edge(port2Descriptor, port1Descriptor, *this);
}

References descriptor().

Referenced by DefaultICDecoderGenerator::addRV32MicroCode().

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◆ end() [1/2]

Netlist::iterator ProGe::Netlist::end ( )

Definition at line 448 of file Netlist.cc.

             {
    return boost::edges(*this).second;
}

Referenced by ProGe::NetlistVisualization::listConnections().

◆ end() [2/2]

Netlist::const_iterator ProGe::Netlist::end ( ) const

Definition at line 458 of file Netlist.cc.

                   {
    return boost::edges(*this).second;
}

◆ hasConnections()

bool ProGe::Netlist::hasConnections ( ) const

Returns true if there are some connections between ports.

Definition at line 296 of file Netlist.cc.

                              {
    return boost::num_edges(*this) != 0;
}

◆ hasParameter()

bool ProGe::Netlist::hasParameter ( const std::string & name ) const

Tells whether the netlist has the given parameter.

Parameters

name	Name of the parameter.

Definition at line 403 of file Netlist.cc.

                                                 {
 
    for (ParameterTable::const_iterator iter = parameters_.begin(); 
         iter != parameters_.end(); iter++) {
        if (iter->name() == name) {
            return true;
        }
    }
 
    return false;
}

References parameters_.

Referenced by ProGe::NetlistGenerator::addBaseRFToNetlist(), ProGe::NetlistGenerator::addFUExternalPortsToNetlist(), and setParameter().

◆ isEmpty()

bool ProGe::Netlist::isEmpty ( ) const

Tells whether the netlist is empty.

Returns: True if the netlist is empty, otherwise false.

Definition at line 288 of file Netlist.cc.

                       {
    return boost::num_vertices(*this) == 0;
}

Referenced by ProGe::VerilogNetlistWriter::write().

◆ isPortConnected()

bool ProGe::Netlist::isPortConnected ( const NetlistPort & port ) const

Tells whether the netlist port is connected in this netlist instance

Parameters

port	The netlist port

Returns: True if port is connected

Definition at line 273 of file Netlist.cc.

                                                      {
    
    size_t vertDesc = descriptor(port);
    boost::graph_traits<Netlist>::degree_size_type edges = 
        boost::out_degree(vertDesc, *this);
    return edges != 0;
}

References descriptor().

Referenced by ProGe::BaseNetlistBlock::connectClocks(), connectClocks(), ProGe::BaseNetlistBlock::connectResets(), and connectResets().

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◆ isRegistered()

bool ProGe::Netlist::isRegistered ( const NetlistPort & port ) const

Returns true if the netlist has the given port.

Definition at line 334 of file Netlist.cc.

                                                   {
    return MapTools::containsKey(vertexDescriptorMap_, &port);
}

References MapTools::containsKey(), and vertexDescriptorMap_.

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◆ parameter()

Parameter ProGe::Netlist::parameter ( size_t index ) const

Returns the parameter at the given position.

Parameters

index The position.

Exceptions

OutOfRange If the given index is negative or not smaller than the number of parameters.

Definition at line 434 of file Netlist.cc.

                                     {
    if (index >= parameterCount()) {
        throw OutOfRange(__FILE__, __LINE__, __func__);
    }
 
    return parameters_[index];
}

References __func__, parameterCount(), and parameters_.

Referenced by PlatformIntegrator::copyProgeBlockToNetlist(), ProGe::NetlistPort::resolveRealWidth(), ProGe::NetlistBlock::shallowCopy(), ProGe::BaseNetlistBlock::shallowCopy(), ProGe::VerilogNetlistWriter::writeNetlistParameterPackage(), and ProGe::VHDLNetlistWriter::writeNetlistParameterPackage().

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◆ parameterCount()

size_t ProGe::Netlist::parameterCount ( ) const

Returns the number of parameters in the netlist.

Returns: The number of parameters.

Definition at line 422 of file Netlist.cc.

                              {
    return parameters_.size();
}

References parameters_.

Referenced by parameter(), ProGe::NetlistPort::resolveRealWidth(), ProGe::NetlistBlock::shallowCopy(), ProGe::BaseNetlistBlock::shallowCopy(), ProGe::VerilogNetlistWriter::writeBlock(), ProGe::VHDLNetlistWriter::writeBlock(), ProGe::VerilogNetlistWriter::writeNetlistParameterPackage(), and ProGe::VHDLNetlistWriter::writeNetlistParameterPackage().

◆ registerPort()

size_t ProGe::Netlist::registerPort ( NetlistPort & port )

Registers given port to the netlist to make connection possible.

This method does not need to be called by clients.

Parameters

port The port.

Returns: Descriptor to the port.

Definition at line 309 of file Netlist.cc.

                                       {
    assert(
        !MapTools::containsKey(vertexDescriptorMap_, &port) &&
        "The port is already registered");
    size_t descriptor = boost::add_vertex(&port, *this);
    vertexDescriptorMap_.insert(
        std::pair<const NetlistPort*, size_t>(&port, descriptor));
    return descriptor;
}

References assert, MapTools::containsKey(), descriptor(), and vertexDescriptorMap_.

Referenced by ProGe::BaseNetlistBlock::addPort(), and ProGe::BaseNetlistBlock::addSubBlock().

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◆ removeParameter()

void ProGe::Netlist::removeParameter ( const std::string & name )

Removes the given parameter from the netlist.

Parameters

name	Name of the parameter.

Definition at line 386 of file Netlist.cc.

                                              {
    for (ParameterTable::iterator iter = parameters_.begin();
         iter != parameters_.end(); iter++) {
        if (iter->name() == name) {
            parameters_.erase(iter);
            break;
        }
    }
}

References parameters_.

Referenced by setParameter().

◆ setParameter() [1/2]

void ProGe::Netlist::setParameter ( const Parameter & param )

Definition at line 376 of file Netlist.cc.

                                            {
    setParameter(param.name(), param.type(), param.value());
}

References ProGe::Parameter::name(), setParameter(), ProGe::Parameter::type(), and ProGe::Parameter::value().

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◆ setParameter() [2/2]

void ProGe::Netlist::setParameter	(	const std::string &	name,
		const std::string &	type,
		const std::string &	value
	)

[DEPRECATED] Adds a parameter for the netlist.

If the netlist already has a parameter with the given name, it is replaced by the new parameter.

Parameters

name	Name of the parameter.
type	Type of the parameter.
value	Value of the parameter.

Definition at line 362 of file Netlist.cc.

                            {
 
    if (hasParameter(name)) {
        removeParameter(name);
    }
 
    Parameter param = {name, type, value};
    parameters_.push_back(param);
}

References hasParameter(), parameters_, and removeParameter().

Referenced by ProGe::NetlistGenerator::addBaseRFToNetlist(), ProGe::NetlistGenerator::addFUExternalPortsToNetlist(), PlatformIntegrator::copyProgeBlockToNetlist(), AlmaIFIntegrator::initAlmaifBlock(), setParameter(), ProGe::NetlistBlock::shallowCopy(), and ProGe::BaseNetlistBlock::shallowCopy().

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◆ unregisterPort()

void ProGe::Netlist::unregisterPort ( NetlistPort & port )

Removes port from the netlist and all connections related to it.

Definition at line 342 of file Netlist.cc.

                                         {
    if (MapTools::containsKey(vertexDescriptorMap_, &port)) {
        boost::clear_vertex(this->descriptor(port), *this);
        boost::remove_vertex(this->descriptor(port), *this);
        vertexDescriptorMap_.erase(&port);
    }
}

References MapTools::containsKey(), descriptor(), and vertexDescriptorMap_.

Referenced by ProGe::BaseNetlistBlock::removePort().

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Member Data Documentation

◆ coreEntityName_

TCEString ProGe::Netlist::coreEntityName_

private

This should be set to the entity name of the generate core, if it's not the same as the toplevel module name.

Definition at line 152 of file Netlist.hh.

◆ INVERTER_INPUT

const std::string ProGe::Netlist::INVERTER_INPUT

staticprivate

Definition at line 155 of file Netlist.hh.

◆ INVERTER_MODULE

const std::string ProGe::Netlist::INVERTER_MODULE

staticprivate

Definition at line 154 of file Netlist.hh.

◆ INVERTER_OUTPUT

const std::string ProGe::Netlist::INVERTER_OUTPUT

staticprivate

Definition at line 156 of file Netlist.hh.

◆ parameters_

ParameterTable ProGe::Netlist::parameters_

private

Parameters of the netlist.

Definition at line 148 of file Netlist.hh.

Referenced by hasParameter(), parameter(), parameterCount(), removeParameter(), and setParameter().

◆ vertexDescriptorMap_

DescriptorMap ProGe::Netlist::vertexDescriptorMap_

private

Vertex descriptor map.

Definition at line 146 of file Netlist.hh.

Referenced by descriptor(), descriptorBegin(), descriptorBegin(), descriptorEnd(), descriptorEnd(), isRegistered(), registerPort(), and unregisterPort().

The documentation for this class was generated from the following files:

Public Types

Public Member Functions

Static Public Member Functions

Private Types

Private Attributes

Static Private Attributes

Detailed Description

Member Typedef Documentation

◆ const_descriptor_iterator

◆ const_iterator

◆ descriptor_iterator

◆ DescriptorMap

◆ iterator

◆ ParameterTable

Constructor & Destructor Documentation

◆ Netlist()

◆ ~Netlist()

Member Function Documentation

◆ begin() [1/2]

◆ begin() [2/2]

◆ connect() [1/4]

◆ connect() [2/4]

◆ connect() [3/4]

◆ connect() [4/4]

◆ connectBy()

◆ connectClocks()

◆ connectGroupByName()

◆ connectResets()

◆ descriptor()

◆ descriptorBegin() [1/2]

◆ descriptorBegin() [2/2]

◆ descriptorEnd() [1/2]

◆ descriptorEnd() [2/2]

◆ disconnectPorts()

◆ end() [1/2]

◆ end() [2/2]

◆ hasConnections()

◆ hasParameter()

◆ isEmpty()

◆ isPortConnected()

◆ isRegistered()

◆ parameter()

◆ parameterCount()

◆ registerPort()

◆ removeParameter()

◆ setParameter() [1/2]

◆ setParameter() [2/2]

◆ unregisterPort()

Member Data Documentation

◆ coreEntityName_

◆ INVERTER_INPUT

◆ INVERTER_MODULE

◆ INVERTER_OUTPUT

◆ parameters_

◆ vertexDescriptorMap_