OpenASIP 2.2
|
#include <NetlistBlock.hh>
Public Member Functions | |
NetlistBlock (const std::string &moduleName, const std::string &instanceName, BaseNetlistBlock *parent=NULL) | |
virtual | ~NetlistBlock () |
void | setParameter (const std::string &name, const std::string &type, const std::string &value) |
void | removePort (NetlistPort &port) |
virtual NetlistPort * | port (const std::string &portName, bool partialMatch=true) |
NetlistBlock & | subBlock (size_t index) override |
virtual const NetlistBlock & | parentBlock () const override |
virtual NetlistBlock & | parentBlock () override |
NetlistBlock * | shallowCopy (const std::string &instanceName) const |
virtual void | write (const Path &targetBaseDir, HDL targetLang=VHDL) const override |
void | addParameter (const Parameter ¶m) |
void | setParameter (const Parameter ¶m) |
virtual const Parameter & | parameter (const std::string &name) const |
virtual const Parameter & | parameter (size_t index) const |
Parameter & | parameter (const std::string &name) |
NetlistPort * | addPort (NetlistPort *port) |
void | removePort (NetlistPort *port) |
virtual size_t | portCount () const |
virtual const NetlistPort & | port (size_t index) const |
virtual const NetlistPort * | port (const std::string &portName, bool partialMatch=true) const |
virtual NetlistPort & | port (size_t index) |
void | addPortGroup (NetlistPortGroup *portGroup) |
void | addSubBlock (BaseNetlistBlock *subBlock, const std::string &instanceName="") |
virtual size_t | subBlockCount () const |
virtual const Netlist & | netlist () const |
Netlist & | netlist () |
void | addPackage (const std::string &packageName) |
virtual size_t | packageCount () const |
virtual const std::string & | package (size_t idx) const |
![]() | |
BaseNetlistBlock () | |
BaseNetlistBlock (BaseNetlistBlock *parent) | |
BaseNetlistBlock (const std::string &moduleName, const std::string &instanceName, BaseNetlistBlock *parent=nullptr) | |
virtual | ~BaseNetlistBlock () |
const std::string & | instanceName () const |
void | setInstanceName (const std::string &name) |
const std::string & | moduleName () const |
const std::string | name () const |
virtual const BaseNetlistBlock & | subBlock (size_t index) const |
virtual bool | hasSubBlock (const std::string &instanceName) const |
virtual bool | isSubBlock (const BaseNetlistBlock &block) const |
virtual bool | hasParameter (const std::string &name) const |
virtual size_t | parameterCount () const |
virtual std::vector< const NetlistPort * > | portsBy (SignalType type) const |
virtual const NetlistPort & | portBy (SignalType type, size_t index=0) const |
virtual bool | hasPortsBy (SignalType type) const |
virtual size_t | portGroupCount () const |
virtual const NetlistPortGroup & | portGroup (size_t index) const |
virtual std::vector< const NetlistPortGroup * > | portGroupsBy (SignalGroupType type) const |
virtual bool | hasParentBlock () const |
virtual bool | isVirtual () const |
virtual void | build () override |
virtual void | connect () override |
virtual void | finalize () override |
virtual void | writeSelf (const Path &targetBaseDir, HDL targetLang=VHDL) const |
PortContainerType & | ports () |
virtual bool | isLeaf () const |
BaseNetlistBlock * | shallowCopy (const std::string &instanceName="") const |
![]() | |
virtual | ~IGenerationPhases () |
Represents a hardware block in the netlist.
Definition at line 61 of file NetlistBlock.hh.
ProGe::NetlistBlock::NetlistBlock | ( | const std::string & | moduleName, |
const std::string & | instanceName, | ||
BaseNetlistBlock * | parent = NULL |
||
) |
Constructor. Creates a netlist with no ports.
The created is empty. Only its name, the parent netlist and the name of the instance module are defined.
moduleName | Name of the module. |
instanceName | Name of the instance of the module. |
netlist | The netlist which the belongs to. |
Definition at line 68 of file NetlistBlock.cc.
|
virtual |
void ProGe::BaseNetlistBlock::addPackage | ( | const std::string & | packageName | ) |
Definition at line 162 of file BaseNetlistBlock.cc.
Referenced by PlatformIntegrator::copyProgeBlockToNetlist(), ProGe::NetlistGenerator::generate(), DefaultICDecoderGenerator::generateDebuggerCode(), and shallowCopy().
void ProGe::BaseNetlistBlock::addParameter | ( | const Parameter & | param | ) |
Adds new parameter to the block. Throws exception if the block has the parameter by the name already.
Definition at line 156 of file BaseNetlistBlock.cc.
Referenced by ProGe::NetlistGenerator::addGCUToNetlist().
NetlistPort * ProGe::BaseNetlistBlock::addPort | ( | NetlistPort * | port | ) |
Adds port to this block and acquires ownership of it.
Added port will point to this block after the call.
ObjectAlreadyExists | Thrown if the netlist block already has a port by same name. |
Definition at line 151 of file BaseNetlistBlock.cc.
void ProGe::BaseNetlistBlock::addPortGroup | ( | NetlistPortGroup * | portGroup | ) |
Definition at line 153 of file BaseNetlistBlock.cc.
Referenced by ProGe::NetlistGenerator::addFUExternalPortsToNetlist(), ProGe::NetlistGenerator::addGCUToNetlist(), FUGen::createExternalInterfaces(), AlmaIFIntegrator::initAlmaifBlock(), and shallowCopy().
void ProGe::BaseNetlistBlock::addSubBlock | ( | BaseNetlistBlock * | subBlock, |
const std::string & | instanceName = "" |
||
) |
Adds sub block to this block and acquires ownership of it.
subBlock | The block to be added. |
instanceName | The instance base name to be given for sub block. If the given or sub block's instance name is not unique within the block The name will be prefixed with a running number. |
Definition at line 146 of file BaseNetlistBlock.cc.
Referenced by ProGe::NetlistGenerator::addBaseRFToNetlist(), ProGe::NetlistGenerator::addFUToNetlist(), ProGe::NetlistGenerator::addGCUToNetlist(), ProGe::NetlistGenerator::addGeneratableFUsToNetlist(), DefaultICGenerator::addICToNetlist(), MemoryGenerator::addMemory(), XilinxBlockRamGenerator::addMemory(), DefaultICDecoderGenerator::addRV32MicroCode(), MemoryGenerator::connectPorts(), PlatformIntegrator::copyProgeBlockToNetlist(), MemoryGenerator::createMemoryNetlistBlock(), and DefaultICDecoderGenerator::generateDebuggerCode().
Netlist & ProGe::BaseNetlistBlock::netlist | ( | ) |
Definition at line 139 of file BaseNetlistBlock.cc.
|
virtual |
Reimplemented from ProGe::BaseNetlistBlock.
Definition at line 107 of file BaseNetlistBlock.cc.
References ProGe::BaseNetlistBlock::portGroups_.
Referenced by ProGe::NetlistGenerator::addBaseRFToNetlist(), ProGe::NetlistGenerator::addFUExternalPortsToNetlist(), ProGe::NetlistGenerator::addFUToNetlist(), ProGe::NetlistGenerator::addGCUToNetlist(), ProGe::NetlistGenerator::addGeneratableFUsToNetlist(), DefaultDecoderGenerator::addGlockPortToDecoder(), DefaultICGenerator::addICToNetlist(), DefaultDecoderGenerator::addLockReqPortToDecoder(), XilinxBlockRamGenerator::addMemory(), DefaultICDecoderGenerator::addRV32MicroCode(), DefaultDecoderGenerator::completeDecoderBlock(), ProGe::Netlist::connectClocks(), AlteraHibiDpRamGenerator::connectPorts(), MemoryGenerator::connectPorts(), ProGe::Netlist::connectResets(), PlatformIntegrator::connectToplevelPort(), PlatformIntegrator::copyProgeBlockToNetlist(), FUGen::createExternalInterfaces(), DefaultICDecoderGenerator::generateDebuggerCode(), AlmaIFIntegrator::initAlmaifBlock(), AlmaIFIntegrator::integrateCore(), PlatformIntegrator::integrateCore(), shallowCopy(), and write().
|
virtual |
Reimplemented from ProGe::BaseNetlistBlock.
Definition at line 123 of file BaseNetlistBlock.cc.
References ProGe::BaseNetlistBlock::subBlocks_.
Referenced by PlatformIntegrator::copyProgeBlockToNetlist(), and shallowCopy().
|
virtual |
Reimplemented from ProGe::BaseNetlistBlock.
Definition at line 122 of file BaseNetlistBlock.cc.
Referenced by PlatformIntegrator::copyProgeBlockToNetlist(), and shallowCopy().
Parameter & ProGe::BaseNetlistBlock::parameter | ( | const std::string & | name | ) |
Returns a Parameter object by name.
NotAvailable | Thrown if the block does not have such Parameter. |
Definition at line 157 of file BaseNetlistBlock.cc.
|
virtual |
Returns a Parameter object by name.
NotAvailable | Thrown if the block does not have such Parameter. |
Reimplemented from ProGe::BaseNetlistBlock.
Definition at line 89 of file BaseNetlistBlock.cc.
Referenced by ProGe::NetlistGenerator::addBaseRFToNetlist(), ProGe::NetlistGenerator::addFUExternalPortsToNetlist(), PlatformIntegrator::copyProgeBlockToNetlist(), shallowCopy(), SOPCBuilderFileGenerator::writeGenerics(), and IPXactFileGenerator::writeProjectFiles().
|
virtual |
Reimplemented from ProGe::BaseNetlistBlock.
Definition at line 91 of file BaseNetlistBlock.cc.
|
overridevirtual |
Returns the parent .
InstanceNotFound | If the does not have a parent . |
Reimplemented from ProGe::BaseNetlistBlock.
Definition at line 126 of file NetlistBlock.cc.
References ProGe::BaseNetlistBlock::hasParentBlock(), and ProGe::BaseNetlistBlock::parentBlock().
Referenced by DefaultDecoderGenerator::addGlockPortToDecoder(), DefaultDecoderGenerator::addLockReqPortToDecoder(), and DefaultICDecoderGenerator::generateDebuggerCode().
|
overridevirtual |
Returns the parent .
InstanceNotFound | If the does not have a parent . |
Reimplemented from ProGe::BaseNetlistBlock.
Definition at line 144 of file NetlistBlock.cc.
References ProGe::BaseNetlistBlock::hasParentBlock(), and ProGe::BaseNetlistBlock::parentBlock().
|
virtual |
Definition at line 97 of file NetlistBlock.cc.
References ProGe::BaseNetlistBlock::findPort().
Referenced by DefaultICGenerator::addICToNetlist(), ProGe::GeneratableFUNetlistBlock::addInOperand(), MemoryGenerator::addMemory(), Stratix2SramGenerator::addMemory(), XilinxBlockRamGenerator::addMemory(), ProGe::GeneratableFUNetlistBlock::addOutOperand(), DefaultICDecoderGenerator::addRV32MicroCode(), SOPCBuilderFileGenerator::countAvalonMMMasters(), SOPCBuilderFileGenerator::createInterfaces(), AlmaIFIntegrator::exportUnconnectedPorts(), PlatformIntegrator::exportUnconnectedPorts(), DefaultICDecoderGenerator::generateDebuggerCode(), AlmaIFIntegrator::integrateCore(), PlatformIntegrator::integrateCore(), MemoryGenerator::isCompatible(), IPXactClkInterface::mapPortsToInterface(), IPXactHibiInterface::mapPortsToInterface(), IPXactResetInterface::mapPortsToInterface(), Stratix2DSPBoardIntegrator::mapToplevelPorts(), Stratix3DevKitIntegrator::mapToplevelPorts(), DefaultDecoderGenerator::opcodeWidth(), shallowCopy(), DefaultDecoderGenerator::writeControlRegisterMappings(), DefaultICGenerator::writeInterconnectionNetwork(), and IPXactFileGenerator::writeProjectFiles().
|
virtual |
Returns a port that matches (partially) the given name.
Reimplemented from ProGe::BaseNetlistBlock.
Definition at line 98 of file BaseNetlistBlock.cc.
|
virtual |
Reimplemented from ProGe::BaseNetlistBlock.
Definition at line 141 of file BaseNetlistBlock.cc.
|
virtual |
Reimplemented from ProGe::BaseNetlistBlock.
Definition at line 94 of file BaseNetlistBlock.cc.
|
virtual |
Return port count in this block including ports from netlist port groups.
Reimplemented from ProGe::BaseNetlistBlock.
Definition at line 93 of file BaseNetlistBlock.cc.
Referenced by MemoryGenerator::addMemory(), XilinxBlockRamGenerator::addMemory(), SOPCBuilderFileGenerator::countAvalonMMMasters(), SOPCBuilderFileGenerator::createInterfaces(), AlmaIFIntegrator::exportUnconnectedPorts(), PlatformIntegrator::exportUnconnectedPorts(), AlmaIFIntegrator::integrateCore(), IPXactClkInterface::mapPortsToInterface(), IPXactHibiInterface::mapPortsToInterface(), IPXactResetInterface::mapPortsToInterface(), Stratix2DSPBoardIntegrator::mapToplevelPorts(), Stratix3DevKitIntegrator::mapToplevelPorts(), shallowCopy(), and IPXactFileGenerator::writeProjectFiles().
void ProGe::NetlistBlock::removePort | ( | NetlistPort & | port | ) |
void ProGe::BaseNetlistBlock::removePort | ( | NetlistPort * | port | ) |
Removes the given port from the block.
After call the port is parent block reference is set to nullptr.
Definition at line 152 of file BaseNetlistBlock.cc.
void ProGe::BaseNetlistBlock::setParameter | ( | const Parameter & | param | ) |
Adds parameter to the block overwriting the existing one by name.
Definition at line 155 of file BaseNetlistBlock.cc.
void ProGe::NetlistBlock::setParameter | ( | const std::string & | name, |
const std::string & | type, | ||
const std::string & | value | ||
) |
Sets the given parameter for the .
name | Name of the parameter. |
type | Type of the parameter. |
value | Value of the parameter. |
Definition at line 89 of file NetlistBlock.cc.
References ProGe::BaseNetlistBlock::name(), ProGe::BaseNetlistBlock::Parameter, and setParameter().
Referenced by ProGe::NetlistGenerator::addBaseRFToNetlist(), ProGe::NetlistGenerator::addFUExternalPortsToNetlist(), ProGe::NetlistGenerator::addFUToNetlist(), AlteraMemGenerator::addGenerics(), DefaultICDecoderGenerator::addInstructioRegisterBypass(), Stratix2SramGenerator::addMemory(), AlmaIFIntegrator::connectCoreMemories(), PlatformIntegrator::copyProgeBlockToNetlist(), MemoryGenerator::createMemoryNetlistBlock(), DefaultICDecoderGenerator::generate(), DefaultICDecoderGenerator::generateDebuggerCode(), AlmaIFIntegrator::initAlmaifBlock(), setParameter(), and shallowCopy().
NetlistBlock * ProGe::NetlistBlock::shallowCopy | ( | const std::string & | instanceName | ) | const |
Copies the block without its children or internal connections - leaving only the outer portion of the block.
instanceName | New instance name for the copy |
Definition at line 161 of file NetlistBlock.cc.
References addPackage(), ProGe::NetlistPortGroup::addPort(), addPortGroup(), ProGe::NetlistPortGroup::clear(), ProGe::NetlistPortGroup::clone(), ProGe::NetlistPort::copyTo(), ProGe::BaseNetlistBlock::moduleName(), ProGe::NetlistPort::name(), netlist(), package(), packageCount(), parameter(), ProGe::Netlist::parameter(), ProGe::BaseNetlistBlock::parameterCount(), ProGe::Netlist::parameterCount(), port(), ProGe::BaseNetlistBlock::port(), portCount(), ProGe::BaseNetlistBlock::portGroup(), ProGe::BaseNetlistBlock::portGroupCount(), ProGe::Netlist::setParameter(), and setParameter().
Referenced by PlatformIntegrator::copyProgeBlockToNetlist().
|
overridevirtual |
Returns a sub by the given index.
index | The index. |
OutOfRange | If the given index is negative or not smaller than the number of sub blocks. |
Reimplemented from ProGe::BaseNetlistBlock.
Definition at line 110 of file NetlistBlock.cc.
References __func__, ProGe::BaseNetlistBlock::subBlock(), and subBlockCount().
Referenced by FUGen::FUGen(), and DefaultICDecoderGenerator::generateDebuggerCode().
|
virtual |
Reimplemented from ProGe::BaseNetlistBlock.
Definition at line 83 of file BaseNetlistBlock.cc.
Referenced by ProGe::Netlist::connectClocks(), ProGe::Netlist::connectResets(), FUGen::FUGen(), DefaultICDecoderGenerator::generateDebuggerCode(), and subBlock().
|
overridevirtual |
Writes self if non-empty and calls write() function of each sub block.
Reimplemented from ProGe::BaseNetlistBlock.
Definition at line 201 of file NetlistBlock.cc.
References __func__, assert, FileSystem::createDirectory(), FileSystem::DIRECTORY_SEPARATOR, FileSystem::fileExists(), netlist(), ProGe::Verilog, ProGe::VHDL, ProGe::BaseNetlistBlock::write(), and ProGe::NetlistWriter::write().
Referenced by ProGe::ProcessorGenerator::generateProcessor(), and removePort().