OpenASIP  2.0
BFScheduleTD.cc
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1 /*
2  Copyright (c) 2002-2014 Tampere University.
3 
4  This file is part of TTA-Based Codesign Environment (TCE).
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24 
25 /**
26  * @file BFScheduleTD.cc
27  *
28  * Definition of BFScheduleTD class
29  *
30  * Tries to schedule a move in top-down order.
31  *
32  * @author Heikki Kultala 2014-2020(heikki.kultala-no.spam-tuni.fi)
33  * @note rating: red
34  */
35 
36 #include "BFScheduleTD.hh"
37 #include "BFRegCopyAfter.hh"
38 #include "BFRegCopyBefore.hh"
39 #include "SimpleResourceManager.hh"
40 #include "MoveNode.hh"
41 #include "DataDependenceGraph.hh"
42 
43 #include "BFLateBypasses.hh"
44 #include "BF2Scheduler.hh"
45 
46 #include "UniversalMachine.hh"
47 
48 #include "Move.hh"
49 #include "Bus.hh"
50 
51 #include <climits>
52 
53 //#define DEBUG_BUBBLEFISH_SCHEDULER
54 
55 bool
57 #ifdef DEBUG_BUBBLEFISH_SCHEDULER
58  std::cerr << "\tPerforming BFSchduleTD for: " << mn_.toString() <<
59  " ec limit: " << ec_ << std::endl;
60 #endif
63  mn_.move().setBus(UniversalMachine::instance().universalBus());
64  }
65 
68  if (runPreChild(lbp)) {
69  if (lbp->removedSource()) {
70  return true;
71  }
72  }
73  }
74 
75 
76  BFRegCopy* regCopyBefore = NULL;
77  BFRegCopy* regCopyAfter = NULL;
78  if (!canBeScheduled(mn_)) {
79  if (/*isRegCopyAfter_ || */ mn_.isSourceOperation()) {
80  regCopyAfter = new BFRegCopyAfter(sched_,mn_, INT_MAX);
81  } else {
82  regCopyBefore = new BFRegCopyBefore(sched_,mn_, INT_MAX);
83  if (!runPreChild(regCopyBefore)) {
84  return false;
85  }
86  }
87  }
88 
89  int ddglc = std::min(sched_.maximumAllowedCycle(),
90  ddg().latestCycle(mn_, ii(), false, false));
91  int ddgec = std::max(ec_,
92  ddg().earliestCycle(mn_, ii(), false, false));
93  int rmec = rmEC(ddgec, mn_);
94 #ifdef DEBUG_BUBBLEFISH_SCHEDULER
95  std::cerr << "\t\tDDG lc: " << ddglc << std::endl;
96  std::cerr << "\t\tDDG ec: " << ddgec << std::endl;
97  std::cerr << "\t\tRM ec: " << rmec << std::endl;
98 #endif
99  if (rmec != -1 && ddglc >= rmec) {
100  createdCopy_ = assign(rmec, mn_);
101  if (regCopyAfter != NULL) {
102  if (!runPostChild(regCopyAfter)) {
104  return false;
105  }
106  }
107 #ifdef DEBUG_BUBBLEFISH_SCHEDULER
108  std::cerr << "\t\tTD Assigned ok:" << mn_.toString()
109  << " bus: " << mn_.move().bus().name() << std::endl;
110 #endif
111  return true;
112  } else {
114  return false;
115  }
116 }
117 
118 void
120 #ifdef DEBUG_BUBBLEFISH_SCHEDULER
121  std::cerr << "unassign td: " << mn_.toString() << std::endl;
122 #endif
123  if (mn_.isScheduled()) {
125  }
127  mn_.move().setBus(UniversalMachine::instance().universalBus());
128  }
129 }
BFLateBypasses.hh
BFOptimization::unassign
virtual void unassign(MoveNode &mn, bool disposePrologCopy=true)
Definition: BFOptimization.cc:196
BFScheduleTD::createdCopy_
bool createdCopy_
Definition: BFScheduleTD.hh:58
Reversible::undoAndRemovePreChildren
void undoAndRemovePreChildren()
Definition: Reversible.cc:80
BFOptimization::assign
virtual bool assign(int cycle, MoveNode &, const TTAMachine::Bus *bus=nullptr, const TTAMachine::FunctionUnit *srcFU_=nullptr, const TTAMachine::FunctionUnit *dstFU=nullptr, const TTAMachine::Bus *prologBus=nullptr, int immWriteCycle=-1, int prologImmWriteCycle=-1, const TTAMachine::ImmediateUnit *immu=nullptr, int immRegIndex=-1, bool ignoreGuardWriteCycle=false)
Definition: BFOptimization.cc:103
MoveNode::isDestinationVariable
bool isDestinationVariable() const
Definition: MoveNode.cc:264
TTAMachine::Component::name
virtual TCEString name() const
Definition: MachinePart.cc:125
MoveNode::toString
std::string toString() const
Definition: MoveNode.cc:576
BFLateBypasses
Definition: BFLateBypasses.hh:44
BFOptimization::ii
unsigned int ii() const
Definition: BFOptimization.cc:85
UniversalMachine::universalBus
TTAMachine::Bus & universalBus() const
Definition: UniversalMachine.cc:306
UniversalMachine::instance
static UniversalMachine & instance()
Definition: UniversalMachine.cc:73
TTAProgram::Move::bus
const TTAMachine::Bus & bus() const
Definition: Move.cc:373
DataDependenceGraph.hh
BFOptimization::rmEC
virtual int rmEC(int cycle, MoveNode &mn, const TTAMachine::Bus *bus=nullptr, const TTAMachine::FunctionUnit *srcFU=nullptr, const TTAMachine::FunctionUnit *dstFU=nullptr, const TTAMachine::Bus *prologBus=nullptr, int immWriteCycle=-1, int prologImmWriteCycle=-1, const TTAMachine::ImmediateUnit *immu=nullptr, int immRegIndex=-1)
Definition: BFOptimization.cc:213
BFScheduleTD.hh
BFOptimization::sched_
BF2Scheduler & sched_
Definition: BFOptimization.hh:103
BFRegCopy
Definition: BFRegCopy.hh:47
assert
#define assert(condition)
Definition: Application.hh:86
BFRegCopyAfter
Definition: BFRegCopyAfter.hh:44
UniversalMachine.hh
BFScheduleTD::undoOnlyMe
virtual void undoOnlyMe()
Definition: BFScheduleTD.cc:119
BF2Scheduler.hh
BFRegCopyBefore.hh
MoveNode::isSourceOperation
bool isSourceOperation() const
Definition: MoveNode.cc:168
BFOptimization::ddg
DataDependenceGraph & ddg()
Definition: BFOptimization.cc:70
BFScheduleTD::allowLateBypass_
bool allowLateBypass_
Definition: BFScheduleTD.hh:57
Bus.hh
BFOptimization::canBeScheduled
bool canBeScheduled(const MoveNode &mn)
Definition: BFOptimization.cc:1067
BFScheduleTD::ec_
int ec_
Definition: BFScheduleTD.hh:56
BFLateBypasses::removedSource
bool removedSource()
Definition: BFLateBypasses.hh:49
BFScheduleTD::operator()
virtual bool operator()()
Definition: BFScheduleTD.cc:56
MoveNode::move
TTAProgram::Move & move()
BFRegCopyBefore
Definition: BFRegCopyBefore.hh:44
Reversible::runPreChild
bool runPreChild(Reversible *preChild)
Definition: Reversible.cc:127
SimpleResourceManager.hh
MoveNode::isScheduled
bool isScheduled() const
Definition: MoveNode.cc:409
BFRegCopyAfter.hh
Move.hh
MoveNode.hh
BF2Scheduler::maximumAllowedCycle
int maximumAllowedCycle() const
Definition: BF2Scheduler.hh:186
Reversible::runPostChild
bool runPostChild(Reversible *preChild)
Definition: Reversible.cc:139
BFScheduleMove::mn_
MoveNode & mn_
Definition: BFScheduleMove.hh:50
TTAProgram::Move::setBus
void setBus(const TTAMachine::Bus &bus)
Definition: Move.cc:383