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33 #ifndef TTA_SIMULATION_CONTROLLER_HH
34 #define TTA_SIMULATION_CONTROLLER_HH
88 virtual void step(
double count = 1) = 0;
90 virtual void next(
int count = 1) = 0;
92 virtual void run() = 0;
96 virtual void reset() = 0;
100 const std::string& rfName,
101 int registerIndex = -1) = 0;
104 const std::string& iuName,
int index = -1) = 0;
107 const std::string& fuName,
108 const std::string& portName) = 0;
virtual MemorySystem & memorySystem(int coreId=-1)
virtual std::string registerFileValue(const std::string &rfName, int registerIndex=-1)=0
virtual InstructionAddress lastExecutedInstruction(int coreId=-1) const
UInt32 InstructionAddress
@ STA_STOPPED
Simulation stopped for some reason.
StopReasonContainer stopReasons_
The set of reasons the simulation was stopped.
TTAMachine::Machine * machine
the architecture definition of the estimated processor
std::set< StopReason > StopReasonContainer
The container type for reasons why simulation stop was requested.
TTASimulationController(SimulatorFrontend &frontend, const TTAMachine::Machine &machine, const TTAProgram::Program &program)
virtual void runUntil(UIntWord address)=0
virtual void step(double count=1)=0
virtual bool automaticFinishImpossible() const
virtual void prepareToStop(StopReason reason)
TTASimulationController & operator=(const TTASimulationController &)
Assignment not allowed.
virtual unsigned int stopReasonCount() const
bool automaticFinishImpossible_
If this is true, simulation cannot be finished automatically.
InstructionAddress initialPC_
The address of the first executed instruction.
@ STA_RUNNING
A run command (run, stepi, until...) given.
SimulationStatus
The states of simulation.
SimulationStatus state_
The current state of the simulation.
SimulatorFrontend & frontend_
Reference to the simulator frontend.
@ STA_INITIALIZED
Simulation initialized and ready to run.
virtual SimulationStatus state() const
virtual std::set< InstructionAddress > findProgramExitPoints(const TTAProgram::Program &program, const TTAMachine::Machine &machine) const
@ STA_FINISHED
Simulation ended after executing the last instruction.
const TTAMachine::Machine & sourceMachine_
The simulated Machine Object Model.
std::vector< InstructionAddress > lastExecutedInstruction_
The address of the last executed instruction.
bool stopRequested_
Flag indicating that simulation should stop.
virtual InstructionAddress programCounter() const =0
StopReason
The reasons to stop simulation.
@ STA_INITIALIZING
Simulation is being initialized.
virtual ~TTASimulationController()
virtual StopReason stopReason(unsigned int index) const
virtual SimulatorFrontend & frontend()
ClockCycleCount clockCount_
How many clock cycles have been simulated.
InstructionAddress firstIllegalInstructionIndex_
The index of the first illegal instruction in the instruction sequence.
virtual SimValue immediateUnitRegisterValue(const std::string &iuName, int index=-1)=0
virtual ClockCycleCount clockCount() const
virtual void next(int count=1)=0
virtual SimValue FUPortValue(const std::string &fuName, const std::string &portName)=0
CycleCount ClockCycleCount
Alias for ClockCycleCount.
find Finds info of the inner loops in the program
const TTAProgram::Program & program_
Program object model of the simulated program.