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1 TTA Processor Designer
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TTA Codesign Environment User
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Contents
4
PROCESSOR DESIGN TOOLS
Subsections
1
TTA Processor Designer (ProDe)
1
Starting ProDe
2
Function Unit Operation Dialog
2
Operation Set Abstraction Layer (OSAL) Tools
1
Operation Set Editor (OSEd)
1
Capabilities of the OSEd
2
Usage
1
Editing Static Operation Properties
2
Operation Behaviour Model
3
Operation Directed Acyclic Graph
4
Operation Modules
5
Data Memory Simulation Model
6
Simulating Operation Behavior
2
Operation Behavior Module Builder (buildopset)
3
OSAL Tester (testosal)
3
OSAL files
1
Operation Properties
1
operation name
2
operation description
3
inputs
4
outputs
5
reads/writes-memory
6
clocked
7
side-effect
8
affected-by
9
affects
10
An example of defining multiple operations that share the same state.
2
Operation Input Properties
1
identification number
2
can-swap
3
mem-address
4
mem-data
3
Operation Output Properties
1
mem-data
4
Operation DAG
5
Operation Behavior
1
Definition of Operation Behavior
2
Operations with state.
3
Main emulation function.
6
Behavior Description language
1
Base data types.
2
Access to operation inputs and outputs.
3
Definition of operation state.
4
Access to operation state.
5
Access to control registers.
6
Context Identification
7
Returning from operation behavior emulation functions.
8
Memory Interface.
4
OSAL search paths
5
Processor Generator (ProGe)
1
IC/Decoder Generators
1
Default IC Decoder Plugin
6
Platform Integrator
7
Supported Platforms
1
Altera based devices
1
Stratix2DSP
2
Stratix3DevKit
3
AvalonIntegrator
4
KoskiIntegrator
2
AlmaIFIntegrator
8
Hardware Database Editor (HDB Editor)
1
Usage
1
Creating a new HDB file
2
Adding new components
3
Adding FU/RF HDL source files
4
Using SRAM based Register File Implementations
9
Hardware Database Tester
1
Usage
2
Test conditions
10
Processor unit tester
1
Usage
11
Function Unit Interface
1
Operation code order
2
Summary of interface ports
1
Input/Output operand ports
2
Input load ports
3
Operation code port
4
Control signals
3
Reserved keywords in generics
Pekka Jääskeläinen 2018-03-12