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1 INTRODUCTION
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TTA Codesign Environment User
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TTA Codesign Environment User
Contents
1 INTRODUCTION
1 Document Overview
2 Acronyms, Abbreviations and Definitions
3 Typographic Conventions Used in the Document
2 PROCESSOR DESIGN FLOW
1 Design Flow Overview
2 Main File Formats
3 TUTORIALS AND HOW-TOS
1 TCE Tour
2 From C to VHDL as Quickly as Possible
3 Hello TTA World!
4 Streaming I/O
5 Implementing Programs in Parallel Assembly Code
6 Using multiple memories from C code
7 Running TTA on FPGA
8 How to print from Altera FPGAs
9 Designing Floating-point Processors with TCE
10 Multi-TTA Designs
11 OpenCL Support
12 System-on-a-Chip design with AlmaIF Integrator
4 PROCESSOR DESIGN TOOLS
1 TTA Processor Designer (ProDe)
2 Operation Set Abstraction Layer (OSAL) Tools
3 OSAL files
4 OSAL search paths
5 Processor Generator (ProGe)
6 Platform Integrator
7 Supported Platforms
8 Hardware Database Editor (HDB Editor)
9 Hardware Database Tester
10 Processor unit tester
11 Function Unit Interface
5 CODE GENERATION TOOLS
1 TCE Compiler
2 Binary Encoding Map Generator (BEMGenerator)
3 Parallel Assembler and Disassembler
4 Program Image Generator (PIG)
5 TPEF Dumper (dumptpef)
6 CO-DESIGN TOOLS
1 Architecture Simulation and Debugging
2 System Level Simulation with SystemC
3 Processor Cost/Performance Estimator (estimate)
4 Automatic Design Space Explorer (explore)
7 PROCESSOR TEMPLATE
1 Architecture Template
2 Programmer Interface
8 PRODUCING EFFICIENT TTA DESIGNS WITH TCE
1 Registers and Register Files
2 Interconnection Network
3 Operation Set
9 TROUBLESHOOTING
1 Simulation
2 Limitations of the Current Toolset Version
A. FREQUENTLY ASKED QUESTIONS
1 Memory Related
2 Processor Generator
3 tcecc
4 Hardware characteristics
5 Misc
B. SystemC Simulation Example
C. Copyright notices
1 Xerces
2 wxWidgets
3 L-GPL
4 TCL
5 SQLite
6 Editline
Bibliography
Pekka Jääskeläinen 2018-03-12