OpenASIP 2.2
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ExecutionPipelineResource.hh
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1/*
2 Copyright (c) 2002-2009 Tampere University.
3
4 This file is part of TTA-Based Codesign Environment (TCE).
5
6 Permission is hereby granted, free of charge, to any person obtaining a
7 copy of this software and associated documentation files (the "Software"),
8 to deal in the Software without restriction, including without limitation
9 the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 and/or sell copies of the Software, and to permit persons to whom the
11 Software is furnished to do so, subject to the following conditions:
12
13 The above copyright notice and this permission notice shall be included in
14 all copies or substantial portions of the Software.
15
16 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 DEALINGS IN THE SOFTWARE.
23 */
24/**
25 * @file ExecutionPipelineResource.hh
26 *
27 * Declaration of prototype of Resource Model:
28 * declaration of the ExecutionPipelineResource class.
29 *
30 * @author Vladimir Guzma 2006 (vladimir.guzma-no.spam-tut.fi)
31 * @author Heikki Kultala 2009 (heikki.kultala-no-spam-tut.fi)
32 * @note rating: red
33 */
34
35#ifndef TTA_EXECUTIONPIPELINERESOURCE_HH
36#define TTA_EXECUTIONPIPELINERESOURCE_HH
37
38#include <climits>
39#include <string>
40#include <vector>
41#include <map>
42
43#include "SchedulingResource.hh"
44#include "MoveNode.hh"
45#include "SparseVectorMap.hh"
46
49
50class PSocketResource;
52
53namespace TTAMachine {
54 class FunctionUnit;
55 class Port;
56 class HWOperation;
57}
58
59/**
60 * ExecutionPipelineResource keeps book of pipeline resource reservation
61 * status. It uses rather simple resource reservation table approach.
62 *
63 */
65public:
68 const unsigned int ii = 0);
70
71 virtual bool isInUse(const int cycle) const override;
72 virtual bool isAvailable(const int cycle) const override;
73 virtual bool canAssign(const int cycle, const MoveNode& node) const override;
74 virtual bool canAssignSource(
75 int cycle,
76 const MoveNode& node,
77 const TTAMachine::Port& resultPort) const;
78 virtual bool canAssignDestination(
79 const int cycle,
80 const MoveNode& node,
81 const bool triggering = false) const;
82 virtual void assign(const int cycle, MoveNode& node) override;
83 virtual void assignSource(
84 int cycle, MoveNode& node);
85 virtual void assignDestination(
86 const int cycle, MoveNode& node);
87 virtual void unassign(const int cycle, MoveNode& node) override;
88 virtual void unassignSource(
89 const int cycle, MoveNode& node);
90 virtual void unassignDestination(const int cycle, MoveNode& node);
91 virtual bool isExecutionPipelineResource() const override;
92 int highestKnownCycle() const;
94 const TTAMachine::Port& port,
95 int cycle, const MoveNode& node, const MoveNode* trigger = NULL,
96 int triggerCycle=INT_MAX) const;
97
98 bool otherTriggerBeforeMyTrigger(const TTAMachine::Port& port, const MoveNode& node, int cycle) const;
99
101 int resultReadCycle, int resultReadyCycle,
102 const MoveNode& node, const TTAMachine::Port& port,
103 const MoveNode* trigger, int triggerCycle) const;
104
105 bool
107 const ProgramOperation& po,
108 const TTAMachine::Port&
109 port, int cycle) const;
110
112 int triggerCycle, const MoveNode& trigger) const;
113
114 void clear() override;
115 void setDDG(const DataDependenceGraph* ddg);
116 virtual void setMaxCycle(unsigned int maxCycle) override { maxCycle_ = maxCycle; }
117protected:
118 virtual bool validateDependentGroups() override;
119 virtual bool validateRelatedGroups() override;
120 unsigned int size() const;
121private:
122
123 inline bool cyclesOverlap(
124 int rangeFirst, int rangeLast, int targetCycle) const ;
125
126 bool cyclesConflict(
127 const MoveNode* mn1, const MoveNode* mn2, int guardCycle,
128 int rangeFirst, int rangeLast, int targetCycle) const;
129
130 bool isLoopBypass(const MoveNode& node) const;
131
133 unsigned int realCycle;
135 int count;
136 ResultHelper() : realCycle(0), po(NULL), count(0) {};
137 ResultHelper(int rc, const ProgramOperation* p, int c) :
138 realCycle(rc), po(p), count(c) {}
139 };
140
142 unsigned int realCycle;
145 OperandUseHelper(int rc, const ProgramOperation* p): realCycle(rc), po(p){}
146 };
147
148 typedef std::pair<ResultHelper,ResultHelper> ResultHelperPair;
149 typedef std::pair<OperandUseHelper,OperandUseHelper> OperandUsePair;
150
151 typedef std::pair<const MoveNode*,const MoveNode*> ResourceReservation;
152
153
154 /// Type for resource vector, represents one cycle of use.
155 /// Includes the ownerships of the reservation.
156 typedef std::vector<ResourceReservation>
158
159 /// Used for both result read and result written.
161
162 typedef std::map<const TTAMachine::Port*, ResultVector> ResultMap;
163
164 typedef std::pair<MoveNode*,MoveNode*> MoveNodePtrPair;
165
168
169 typedef std::map<const TTAMachine::Port*, OperandUseVector> OperandUseMap;
170 typedef std::map<const TTAMachine::Port*, OperandWriteVector>
172
173 /// Type for resource reservation table, resource vector x latency.
174 /// Includes the ownerships of the reservation.
176
177
178 //Copying forbidden
180 // Assignment forbidden
182
183 /// Find first and last cycles already scheduled for same PO
185 const int cycle,
186 const MoveNode& node,
187 int popIndex,
188 int& first,
189 int& last,
190 int& triggering) const;
191
193 const ProgramOperation& po, const TTAMachine::Port& resultPort) const;
194
195 void setResultWriten(
196 const TTAMachine::Port& port,
197 unsigned int realCycle,
198 const ProgramOperation& po);
199
200 void setResultWriten(
201 const ProgramOperation& po,
202 unsigned int triggerCycle);
203
205 const TTAMachine::Port& port, unsigned int realCycle,
206 const ProgramOperation& po);
207
209 const ProgramOperation& po,
210 unsigned int triggerCycle);
211
212 void setOperandUsed(
213 const TTAMachine::Port& port,
214 unsigned int realCycle,
215 const ProgramOperation& po);
216
217 void setOperandsUsed(
218 const ProgramOperation& po,
219 unsigned int triggerCycle);
220
221 void unsetOperandUsed(
222 const TTAMachine::Port& port, unsigned int realCycle,
223 const ProgramOperation& po);
224
226 const ProgramOperation& po,
227 unsigned int triggerCycle);
228
229 const TTAMachine::Port& operandPort(const MoveNode& mn) const;
230
232 int operandWriteCycle,
233 int triggerCycle,
234 const ProgramOperation& po,
235 const MoveNode& operand,
236 const MoveNode& trigger) const;
237
238 bool operandOverwritten(const MoveNode& mn, int cycle) const;
239
240 bool testTriggerResult(const MoveNode& trigger, int cycle) const;
242 int resultCycle, const ProgramOperation& po,
244 const MoveNode& trigger, int triggerCycle) const;
245
246 bool resourcesAllowTrigger(int cycle, const MoveNode& move) const;
247
249 const TTAMachine::Port& port, const MoveNode& mn, int cycle) const;
250
252 const TTAMachine::Port& port, const MoveNode& mn, int cycle) const;
253
255 const MoveNode& currentMn,
256 const TTAMachine::Port& port,
257 int operandWriteCycle,
258 const OperandUseHelper &operandUse,
259 int operandUseModCycle, ProgramOperation& currOp) const;
260
261 bool triggerTooEarly(const MoveNode& trigger, int cycle) const;
262
263 bool operandTooLate(const MoveNode& node, int cycle) const;
264
266 int inputCount,
267 const TTAMachine::HWOperation& hwop,
268 const MoveNode& node,
269 int cycle) const;
270
272 const TTAMachine::Port& port, const MoveNode& mn, int cycle) const;
273
275 const MoveNode& mn, int cycle) const;
276
278 const ProgramOperation& po, TTAMachine::Port& port);
279
280
282 const TTAMachine::Port& port,
283 const ProgramOperation& po,
284 const MoveNode& mn) const;
285
286 const TTAMachine::Port& resultPort(const MoveNode& mn) const;
287
288 bool exclusiveMoves(
289 const MoveNode* mn1, const MoveNode* mn2, int cycle=INT_MAX) const;
290
291 int latestTriggerWriteCycle(const MoveNode& mn) const;
292
293 bool isDestOpOfMN(const MoveNode& mn, const ProgramOperation& po) const;
294
296
297 /// Stores one resource vector per cycle of scope for whole FU
299
300 // Stores PO for each "result ready" a cycle in which it was produced,
301#if 0
302 // Test if other program operation writes into same register
303 // in given cycle
304 bool sameRegisterWrite(
305 const MoveNode& node,
306 ProgramOperation* operation)const;
307#endif
308
311
312 // counts number of results that are ready in that cycle
314 // Stores PO for each "result read" move a cycle in which it was read,
315 // counts number of reads in given cycle
317
318 // Stores for each move a cycle in which the result is written to output
319 // register of FU, this information is not available elsewhere
320 // these are real cycles.
321 std::map<MoveNode*, int, MoveNode::Comparator> storedResultCycles_;
322 // stores the set of assigned source nodes
323 std::multimap<int, MoveNode*> assignedSourceNodes_;
324 // stores the set of assigned destination nodes
325 std::multimap<int, MoveNode*> assignedDestinationNodes_;
326
327 mutable int cachedSize_;
329
332
333 // TODO: is this needed or not?
335
337};
338
339#endif
void unsetOperandsUsed(const ProgramOperation &po, unsigned int triggerCycle)
bool hasConflictingResultsOnCycle(const ProgramOperation &po, const TTAMachine::Port &port, int cycle) const
const TTAMachine::FunctionUnit & fu_
const TTAMachine::Port & resultPort(const MoveNode &mn) const
ResourceReservationTable fuExecutionPipeline_
Stores one resource vector per cycle of scope for whole FU.
ExecutionPipelineResource & operator=(const ExecutionPipelineResource &)
SparseVector< MoveNodePtrPair > OperandWriteVector
virtual void assignDestination(const int cycle, MoveNode &node)
std::multimap< int, MoveNode * > assignedDestinationNodes_
bool resultNotOverWritten(int resultReadCycle, int resultReadyCycle, const MoveNode &node, const TTAMachine::Port &port, const MoveNode *trigger, int triggerCycle) const
virtual bool canAssignSource(int cycle, const MoveNode &node, const TTAMachine::Port &resultPort) const
bool exclusiveMoves(const MoveNode *mn1, const MoveNode *mn2, int cycle=INT_MAX) const
bool operandOverwritten(int operandWriteCycle, int triggerCycle, const ProgramOperation &po, const MoveNode &operand, const MoveNode &trigger) const
SparseVector< ResourceReservationVector > ResourceReservationTable
Type for resource reservation table, resource vector x latency. Includes the ownerships of the reserv...
std::map< MoveNode *, int, MoveNode::Comparator > storedResultCycles_
bool operandSharePreventsTriggerForScheduledResult(const TTAMachine::Port &port, const MoveNode &mn, int cycle) const
virtual bool isExecutionPipelineResource() const override
void setOperandsUsed(const ProgramOperation &po, unsigned int triggerCycle)
void setOperandUsed(const TTAMachine::Port &port, unsigned int realCycle, const ProgramOperation &po)
const TTAMachine::Port & operandPort(const MoveNode &mn) const
bool testTriggerResult(const MoveNode &trigger, int cycle) const
bool resultAllowedAtCycle(int resultCycle, const ProgramOperation &po, const TTAMachine::Port &resultPort, const MoveNode &trigger, int triggerCycle) const
virtual bool validateRelatedGroups() override
int resultReadyCycle(const ProgramOperation &po, const TTAMachine::Port &resultPort) const
bool operandAllowedAtCycle(const TTAMachine::Port &port, const MoveNode &mn, int cycle) const
void setResultWriten(const TTAMachine::Port &port, unsigned int realCycle, const ProgramOperation &po)
virtual void assignSource(int cycle, MoveNode &node)
SparseVector< OperandUsePair > OperandUseVector
int nextResultCycle(const TTAMachine::Port &port, int cycle, const MoveNode &node, const MoveNode *trigger=NULL, int triggerCycle=INT_MAX) const
std::map< const TTAMachine::Port *, OperandUseVector > OperandUseMap
bool isLoopBypass(const MoveNode &node) const
bool isDestOpOfMN(const MoveNode &mn, const ProgramOperation &po) const
bool poConflictsWithInputPort(const TTAMachine::Port &port, const ProgramOperation &po, const MoveNode &mn) const
ExecutionPipelineResource(const ExecutionPipelineResource &)
void findRange(const int cycle, const MoveNode &node, int popIndex, int &first, int &last, int &triggering) const
Find first and last cycles already scheduled for same PO.
bool operandsOverwritten(int triggerCycle, const MoveNode &trigger) const
virtual bool canAssign(const int cycle, const MoveNode &node) const override
virtual void unassignSource(const int cycle, MoveNode &node)
bool cyclesConflict(const MoveNode *mn1, const MoveNode *mn2, int guardCycle, int rangeFirst, int rangeLast, int targetCycle) const
SparseVector< ResultHelperPair > ResultVector
Used for both result read and result written.
bool cyclesOverlap(int rangeFirst, int rangeLast, int targetCycle) const
void unsetResultWriten(const TTAMachine::Port &port, unsigned int realCycle, const ProgramOperation &po)
std::pair< ResultHelper, ResultHelper > ResultHelperPair
const ExecutionPipelineResourceTable * resources
bool operandTooLate(const MoveNode &node, int cycle) const
std::multimap< int, MoveNode * > assignedSourceNodes_
const TTAMachine::Port * triggerPort_
std::vector< ResourceReservation > ResourceReservationVector
Type for resource vector, represents one cycle of use. Includes the ownerships of the reservation.
virtual bool validateDependentGroups() override
std::map< const TTAMachine::Port *, ResultVector > ResultMap
virtual void unassign(const int cycle, MoveNode &node) override
virtual void setMaxCycle(unsigned int maxCycle) override
bool checkOperandAllowed(const MoveNode &currentMn, const TTAMachine::Port &port, int operandWriteCycle, const OperandUseHelper &operandUse, int operandUseModCycle, ProgramOperation &currOp) const
void unsetOperandUsed(const TTAMachine::Port &port, unsigned int realCycle, const ProgramOperation &po)
int latestTriggerWriteCycle(const MoveNode &mn) const
std::pair< const MoveNode *, const MoveNode * > ResourceReservation
std::map< const TTAMachine::Port *, OperandWriteVector > OperandWriteMap
bool triggerAllowedAtCycle(int inputCount, const TTAMachine::HWOperation &hwop, const MoveNode &node, int cycle) const
std::pair< OperandUseHelper, OperandUseHelper > OperandUsePair
virtual void assign(const int cycle, MoveNode &node) override
void setDDG(const DataDependenceGraph *ddg)
virtual bool canAssignDestination(const int cycle, const MoveNode &node, const bool triggering=false) const
bool operandPossibleAtCycle(const TTAMachine::Port &port, const MoveNode &mn, int cycle) const
std::pair< MoveNode *, MoveNode * > MoveNodePtrPair
const DataDependenceGraph * ddg_
bool otherTriggerBeforeMyTrigger(const TTAMachine::Port &port, const MoveNode &node, int cycle) const
virtual void unassignDestination(const int cycle, MoveNode &node)
virtual bool isInUse(const int cycle) const override
bool resourcesAllowTrigger(int cycle, const MoveNode &move) const
bool triggerTooEarly(const MoveNode &trigger, int cycle) const
const MoveNode * nodeOfInputPort(const ProgramOperation &po, TTAMachine::Port &port)
virtual bool isAvailable(const int cycle) const override
bool resultCausesTriggerBetweenOperandSharing(const MoveNode &mn, int cycle) const
OperandUseHelper(int rc, const ProgramOperation *p)
ResultHelper(int rc, const ProgramOperation *p, int c)