35#ifndef TTA_EXECUTIONPIPELINERESOURCE_HH
36#define TTA_EXECUTIONPIPELINERESOURCE_HH
68 const unsigned int ii = 0);
71 virtual bool isInUse(
const int cycle)
const override;
72 virtual bool isAvailable(
const int cycle)
const override;
81 const bool triggering =
false)
const;
96 int triggerCycle=INT_MAX)
const;
103 const MoveNode* trigger,
int triggerCycle)
const;
109 port,
int cycle)
const;
112 int triggerCycle,
const MoveNode& trigger)
const;
114 void clear()
override;
120 unsigned int size()
const;
124 int rangeFirst,
int rangeLast,
int targetCycle)
const ;
128 int rangeFirst,
int rangeLast,
int targetCycle)
const;
156 typedef std::vector<ResourceReservation>
162 typedef std::map<const TTAMachine::Port*, ResultVector>
ResultMap;
170 typedef std::map<const TTAMachine::Port*, OperandWriteVector>
190 int& triggering)
const;
197 unsigned int realCycle,
202 unsigned int triggerCycle);
210 unsigned int triggerCycle);
214 unsigned int realCycle,
219 unsigned int triggerCycle);
227 unsigned int triggerCycle);
232 int operandWriteCycle,
244 const MoveNode& trigger,
int triggerCycle)
const;
257 int operandWriteCycle,
275 const MoveNode& mn,
int cycle)
const;
304 bool sameRegisterWrite(
void unsetOperandsUsed(const ProgramOperation &po, unsigned int triggerCycle)
bool hasConflictingResultsOnCycle(const ProgramOperation &po, const TTAMachine::Port &port, int cycle) const
const TTAMachine::FunctionUnit & fu_
const TTAMachine::Port & resultPort(const MoveNode &mn) const
ResourceReservationTable fuExecutionPipeline_
Stores one resource vector per cycle of scope for whole FU.
ExecutionPipelineResource & operator=(const ExecutionPipelineResource &)
SparseVector< MoveNodePtrPair > OperandWriteVector
virtual void assignDestination(const int cycle, MoveNode &node)
std::multimap< int, MoveNode * > assignedDestinationNodes_
bool resultNotOverWritten(int resultReadCycle, int resultReadyCycle, const MoveNode &node, const TTAMachine::Port &port, const MoveNode *trigger, int triggerCycle) const
virtual bool canAssignSource(int cycle, const MoveNode &node, const TTAMachine::Port &resultPort) const
bool exclusiveMoves(const MoveNode *mn1, const MoveNode *mn2, int cycle=INT_MAX) const
bool operandOverwritten(int operandWriteCycle, int triggerCycle, const ProgramOperation &po, const MoveNode &operand, const MoveNode &trigger) const
SparseVector< ResourceReservationVector > ResourceReservationTable
Type for resource reservation table, resource vector x latency. Includes the ownerships of the reserv...
std::map< MoveNode *, int, MoveNode::Comparator > storedResultCycles_
bool operandSharePreventsTriggerForScheduledResult(const TTAMachine::Port &port, const MoveNode &mn, int cycle) const
virtual bool isExecutionPipelineResource() const override
void setOperandsUsed(const ProgramOperation &po, unsigned int triggerCycle)
void setOperandUsed(const TTAMachine::Port &port, unsigned int realCycle, const ProgramOperation &po)
const TTAMachine::Port & operandPort(const MoveNode &mn) const
bool testTriggerResult(const MoveNode &trigger, int cycle) const
bool resultAllowedAtCycle(int resultCycle, const ProgramOperation &po, const TTAMachine::Port &resultPort, const MoveNode &trigger, int triggerCycle) const
virtual bool validateRelatedGroups() override
int resultReadyCycle(const ProgramOperation &po, const TTAMachine::Port &resultPort) const
bool operandAllowedAtCycle(const TTAMachine::Port &port, const MoveNode &mn, int cycle) const
int highestKnownCycle() const
void setResultWriten(const TTAMachine::Port &port, unsigned int realCycle, const ProgramOperation &po)
virtual void assignSource(int cycle, MoveNode &node)
SparseVector< OperandUsePair > OperandUseVector
int nextResultCycle(const TTAMachine::Port &port, int cycle, const MoveNode &node, const MoveNode *trigger=NULL, int triggerCycle=INT_MAX) const
std::map< const TTAMachine::Port *, OperandUseVector > OperandUseMap
bool isLoopBypass(const MoveNode &node) const
bool isDestOpOfMN(const MoveNode &mn, const ProgramOperation &po) const
bool poConflictsWithInputPort(const TTAMachine::Port &port, const ProgramOperation &po, const MoveNode &mn) const
OperandUseMap operandsUsed_
ExecutionPipelineResource(const ExecutionPipelineResource &)
void findRange(const int cycle, const MoveNode &node, int popIndex, int &first, int &last, int &triggering) const
Find first and last cycles already scheduled for same PO.
bool operandsOverwritten(int triggerCycle, const MoveNode &trigger) const
virtual bool canAssign(const int cycle, const MoveNode &node) const override
virtual void unassignSource(const int cycle, MoveNode &node)
bool cyclesConflict(const MoveNode *mn1, const MoveNode *mn2, int guardCycle, int rangeFirst, int rangeLast, int targetCycle) const
SparseVector< ResultHelperPair > ResultVector
Used for both result read and result written.
bool cyclesOverlap(int rangeFirst, int rangeLast, int targetCycle) const
void unsetResultWriten(const TTAMachine::Port &port, unsigned int realCycle, const ProgramOperation &po)
std::pair< ResultHelper, ResultHelper > ResultHelperPair
virtual ~ExecutionPipelineResource()
const ExecutionPipelineResourceTable * resources
bool operandTooLate(const MoveNode &node, int cycle) const
std::multimap< int, MoveNode * > assignedSourceNodes_
const TTAMachine::Port * triggerPort_
std::vector< ResourceReservation > ResourceReservationVector
Type for resource vector, represents one cycle of use. Includes the ownerships of the reservation.
virtual bool validateDependentGroups() override
std::map< const TTAMachine::Port *, ResultVector > ResultMap
unsigned int size() const
virtual void unassign(const int cycle, MoveNode &node) override
virtual void setMaxCycle(unsigned int maxCycle) override
bool checkOperandAllowed(const MoveNode ¤tMn, const TTAMachine::Port &port, int operandWriteCycle, const OperandUseHelper &operandUse, int operandUseModCycle, ProgramOperation &currOp) const
void unsetOperandUsed(const TTAMachine::Port &port, unsigned int realCycle, const ProgramOperation &po)
int latestTriggerWriteCycle(const MoveNode &mn) const
std::pair< const MoveNode *, const MoveNode * > ResourceReservation
std::map< const TTAMachine::Port *, OperandWriteVector > OperandWriteMap
bool triggerAllowedAtCycle(int inputCount, const TTAMachine::HWOperation &hwop, const MoveNode &node, int cycle) const
OperandWriteMap operandsWriten_
std::pair< OperandUseHelper, OperandUseHelper > OperandUsePair
virtual void assign(const int cycle, MoveNode &node) override
void setDDG(const DataDependenceGraph *ddg)
virtual bool canAssignDestination(const int cycle, const MoveNode &node, const bool triggering=false) const
bool operandPossibleAtCycle(const TTAMachine::Port &port, const MoveNode &mn, int cycle) const
std::pair< MoveNode *, MoveNode * > MoveNodePtrPair
const DataDependenceGraph * ddg_
bool otherTriggerBeforeMyTrigger(const TTAMachine::Port &port, const MoveNode &node, int cycle) const
virtual void unassignDestination(const int cycle, MoveNode &node)
virtual bool isInUse(const int cycle) const override
bool resourcesAllowTrigger(int cycle, const MoveNode &move) const
bool triggerTooEarly(const MoveNode &trigger, int cycle) const
const MoveNode * nodeOfInputPort(const ProgramOperation &po, TTAMachine::Port &port)
virtual bool isAvailable(const int cycle) const override
bool resultCausesTriggerBetweenOperandSharing(const MoveNode &mn, int cycle) const
OperandUseHelper(int rc, const ProgramOperation *p)
const ProgramOperation * po
const ProgramOperation * po
ResultHelper(int rc, const ProgramOperation *p, int c)