OpenASIP  2.0
VHDLNetlistWriter.hh
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1 /*
2  Copyright (c) 2002-2015 Tampere University.
3 
4  This file is part of TTA-Based Codesign Environment (TCE).
5 
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17  IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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24 /**
25  * @file VHDLNetlistWriter.hh
26  *
27  * Declaration of VHDLNetlistWriter class.
28  *
29  * @author Lasse Laasonen 2005 (lasse.laasonen-no.spam-tut.fi)
30  * @author Henry Linjamäki 2015 (henry.linjamaki-no.spam.tut.fi)
31  * @note rating: red
32  */
33 
34 #ifndef TTA_VHDL_NETLIST_WRITER_HH
35 #define TTA_VHDL_NETLIST_WRITER_HH
36 
37 #include <map>
38 #include <string>
39 #include <boost/graph/graph_traits.hpp>
40 
41 #include "NetlistWriter.hh"
42 #include "Netlist.hh"
43 #include "ProGeTypes.hh"
44 
45 namespace ProGe {
46 
47 class BaseNetlistBlock;
48 
49 /**
50  * Writes VHDL files which implement the given netlist block.
51  */
53 public:
54  VHDLNetlistWriter(const BaseNetlistBlock& targetBlock);
55  virtual ~VHDLNetlistWriter();
56 
57  virtual void write(const std::string& dstDirectory);
58 
59  static void writeGenericDeclaration(
60  const BaseNetlistBlock& block,
61  unsigned int indentationLevel,
62  const std::string& indentation,
63  std::ostream& stream);
64  static void writePortDeclaration(
65  const BaseNetlistBlock& block,
66  unsigned int indentationLevel,
67  const std::string& indentation,
68  std::ostream& stream);
69 
70 private:
71  typedef boost::graph_traits<Netlist>::vertex_descriptor
73  typedef boost::graph_traits<Netlist>::edge_descriptor
75  typedef boost::graph_traits<Netlist>::out_edge_iterator
77 
78  void writeNetlistParameterPackage(const std::string& dstDirectory) const;
79  std::string netlistParameterPkgName() const;
80  void writeBlock(
81  const BaseNetlistBlock& block, const std::string& dstDirectory);
83  const BaseNetlistBlock& block,
84  std::ofstream& stream);
86  const BaseNetlistBlock& block,
87  std::ofstream& stream) const;
88 
89  void writeConnection(
90  const BaseNetlistBlock& block,
91  std::ofstream& stream,
92  edge_descriptor edgeDescriptor,
93  NetlistPort* srcPort,
94  NetlistPort* dstPort) const;
95 
97  const BaseNetlistBlock& block,
98  std::ofstream& stream) const;
99  void writePortMappings(
100  const BaseNetlistBlock& block,
101  std::ofstream& stream) const;
102  std::string indentation(unsigned int level) const;
103 
104  TCEString genericMapStringValue(const TCEString& generic) const;
105 
106  static std::string directionString(Direction direction);
107  static std::string generateIndentation(
108  unsigned int level, const std::string& indentation);
109  static bool isNumber(const std::string& formula);
110  static bool usesParameterWidth(const NetlistPort& port);
111  static std::string portSignalName(const NetlistPort& port);
112  static std::string portSignalType(const NetlistPort& port);
113  static TCEString signalRange(
114  int high,
115  int low,
116  bool allowShort = false);
117  static TCEString parameterWidthValue(const NetlistPort& port);
118  static std::string signalAssignment(
119  const NetlistPort& dst, const NetlistPort& src);
120 
121  /// Width of the ground signal.
123 
124 };
125 }
126 
127 #endif
ProGe::BaseNetlistBlock
Definition: BaseNetlistBlock.hh:59
Netlist.hh
ProGe::VHDLNetlistWriter::writeGenericDeclaration
static void writeGenericDeclaration(const BaseNetlistBlock &block, unsigned int indentationLevel, const std::string &indentation, std::ostream &stream)
Definition: VHDLNetlistWriter.cc:214
ProGe::VHDLNetlistWriter::writeConnection
void writeConnection(const BaseNetlistBlock &block, std::ofstream &stream, edge_descriptor edgeDescriptor, NetlistPort *srcPort, NetlistPort *dstPort) const
Definition: VHDLNetlistWriter.cc:444
ProGe::VHDLNetlistWriter::generateIndentation
static std::string generateIndentation(unsigned int level, const std::string &indentation)
Definition: VHDLNetlistWriter.cc:751
ProGe::VHDLNetlistWriter::parameterWidthValue
static TCEString parameterWidthValue(const NetlistPort &port)
Definition: VHDLNetlistWriter.cc:880
ProGe::VHDLNetlistWriter
Definition: VHDLNetlistWriter.hh:52
ProGe::VHDLNetlistWriter::vertex_descriptor
boost::graph_traits< Netlist >::vertex_descriptor vertex_descriptor
Definition: VHDLNetlistWriter.hh:72
ProGe::VHDLNetlistWriter::~VHDLNetlistWriter
virtual ~VHDLNetlistWriter()
Definition: VHDLNetlistWriter.cc:76
ProGe::VHDLNetlistWriter::directionString
static std::string directionString(Direction direction)
Definition: VHDLNetlistWriter.cc:688
ProGe::NetlistWriter
Definition: NetlistWriter.hh:47
ProGe::VHDLNetlistWriter::write
virtual void write(const std::string &dstDirectory)
Definition: VHDLNetlistWriter.cc:88
ProGe::VHDLNetlistWriter::writeSignalAssignments
void writeSignalAssignments(const BaseNetlistBlock &block, std::ofstream &stream) const
Definition: VHDLNetlistWriter.cc:368
NetlistWriter.hh
ProGe::VHDLNetlistWriter::groundWidth_
int groundWidth_
Width of the ground signal.
Definition: VHDLNetlistWriter.hh:122
ProGe::VHDLNetlistWriter::isNumber
static bool isNumber(const std::string &formula)
Definition: VHDLNetlistWriter.cc:712
ProGe::VHDLNetlistWriter::indentation
std::string indentation(unsigned int level) const
Definition: VHDLNetlistWriter.cc:739
ProGe::VHDLNetlistWriter::portSignalType
static std::string portSignalType(const NetlistPort &port)
Definition: VHDLNetlistWriter.cc:798
ProGe::VHDLNetlistWriter::writePortMappings
void writePortMappings(const BaseNetlistBlock &block, std::ofstream &stream) const
Definition: VHDLNetlistWriter.cc:585
ProGe::VHDLNetlistWriter::portSignalName
static std::string portSignalName(const NetlistPort &port)
Definition: VHDLNetlistWriter.cc:769
ProGe::VHDLNetlistWriter::out_edge_iterator
boost::graph_traits< Netlist >::out_edge_iterator out_edge_iterator
Definition: VHDLNetlistWriter.hh:76
ProGe::VHDLNetlistWriter::netlistParameterPkgName
std::string netlistParameterPkgName() const
Definition: VHDLNetlistWriter.cc:128
ProGeTypes.hh
ProGe::VHDLNetlistWriter::usesParameterWidth
static bool usesParameterWidth(const NetlistPort &port)
Definition: VHDLNetlistWriter.cc:728
ProGe::VHDLNetlistWriter::genericMapStringValue
TCEString genericMapStringValue(const TCEString &generic) const
Definition: VHDLNetlistWriter.cc:829
ProGe::VHDLNetlistWriter::writeBlock
void writeBlock(const BaseNetlistBlock &block, const std::string &dstDirectory)
Definition: VHDLNetlistWriter.cc:141
ProGe
Definition: FUGen.hh:54
TCEString
Definition: TCEString.hh:53
ProGe::VHDLNetlistWriter::writePortDeclaration
static void writePortDeclaration(const BaseNetlistBlock &block, unsigned int indentationLevel, const std::string &indentation, std::ostream &stream)
Definition: VHDLNetlistWriter.cc:257
ProGe::VHDLNetlistWriter::writeComponentDeclarations
void writeComponentDeclarations(const BaseNetlistBlock &block, std::ofstream &stream) const
Definition: VHDLNetlistWriter.cc:520
ProGe::VHDLNetlistWriter::signalRange
static TCEString signalRange(int high, int low, bool allowShort=false)
Definition: VHDLNetlistWriter.cc:859
ProGe::VHDLNetlistWriter::VHDLNetlistWriter
VHDLNetlistWriter(const BaseNetlistBlock &targetBlock)
Definition: VHDLNetlistWriter.cc:70
ProGe::NetlistPort
Definition: NetlistPort.hh:70
ProGe::VHDLNetlistWriter::signalAssignment
static std::string signalAssignment(const NetlistPort &dst, const NetlistPort &src)
Definition: VHDLNetlistWriter.cc:892
ProGe::Direction
Direction
Direction of the port.
Definition: ProGeTypes.hh:52
ProGe::VHDLNetlistWriter::writeNetlistParameterPackage
void writeNetlistParameterPackage(const std::string &dstDirectory) const
Definition: VHDLNetlistWriter.cc:103
ProGe::VHDLNetlistWriter::edge_descriptor
boost::graph_traits< Netlist >::edge_descriptor edge_descriptor
Definition: VHDLNetlistWriter.hh:74
ProGe::VHDLNetlistWriter::writeSignalDeclarations
void writeSignalDeclarations(const BaseNetlistBlock &block, std::ofstream &stream)
Definition: VHDLNetlistWriter.cc:300