OpenASIP 2.2
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BFUnscheduleFromBody.cc
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1/*
2 Copyright (c) 2002-2014 Tampere University.
3
4 This file is part of TTA-Based Codesign Environment (TCE).
5
6 Permission is hereby granted, free of charge, to any person obtaining a
7 copy of this software and associated documentation files (the "Software"),
8 to deal in the Software without restriction, including without limitation
9 the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 and/or sell copies of the Software, and to permit persons to whom the
11 Software is furnished to do so, subject to the following conditions:
12
13 The above copyright notice and this permission notice shall be included in
14 all copies or substantial portions of the Software.
15
16 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 DEALINGS IN THE SOFTWARE.
23 */
24
25/**
26 * @file BFUnscheduleFromBody.cc
27 *
28 * Definition of BFUnscheduleFromBody class
29 *
30 * Unschedules a move from the loop body but leaves it to the prolog/epilog.
31 *
32 * @author Heikki Kultala 2014-2020(heikki.kultala-no.spam-tuni.fi)
33 * @note rating: red
34 */
35
36
38#include "Move.hh"
40#include "Bus.hh"
41#include "POMDisassembler.hh"
43#include "Instruction.hh"
44#include "MoveNodeDuplicator.hh"
45#include "Terminal.hh"
46#include "BF2Scheduler.hh"
47
50 oldBus_ = &mn_.move().bus();
51
52 if (mn_.isSourceOperation()) {
54 }
55
58 }
59
64 }
65
66#ifdef DEBUG_BUBBLEFISH_SCHEDULER
67 for (int i = 0; i < recurseCounter_*2; i++)
68 std::cerr << "\t";
69
70 std::cerr << "\t\tUnscheduling original: " << mn_.toString()
71 << " bus: " << oldBus_->name() << std::endl;
72#endif
73 rm().unassign(mn_);
74#ifdef DEBUG_BUBBLEFISH_SCHEDULER
77 for (int i = 0; i < recurseCounter_*2; i++)
78 std::cerr << "\t";
79
80 std::cerr << "\t\tCannot assign to old cycle: " << mn_.toString()
81 << " old cycle: " << oldCycle_ << std::endl;
82 ddg().writeToDotFile("cannot_assign_old_cycle.dot");
83 if (mn_.isSourceOperation()) {
84 std::cerr << "\t\twhole src PO: "
85 << mn_.sourceOperation().toString() << std::endl;
86 }
88 std::cerr << "\t\twhole dst PO: "
89 << mn_.destinationOperation().toString() << std::endl;
90 }
91 assert(false);
92 }
93#endif
94}
95
97#ifdef DEBUG_BUBBLEFISH_SCHEDULER
98 for (int i = 0; i < recurseCounter_*2; i++)
99 std::cerr << "\t";
100
101 std::cerr << "\t\treturning original: " <<mn_.toString()<<" current bus: "
102 << mn_.move().bus().name() << " old bus: " << oldBus_->name()
103 << " cycle: " << oldCycle_ << std::endl;
104#endif
105
106#ifdef DEBUG_BUBBLEFISH_SCHEDULER
109 std::cerr << "Cannot return to old cycle: " << mn_.toString()
110 << " cycle: " << oldCycle_ << std::endl;
112 std::cerr << "dstPO: " << mn_.destinationOperation().toString()
113 << std::endl;
114 }
115 if (mn_.isSourceOperation()) {
116 std::cerr << "srcPO: " << mn_.sourceOperation().toString()
117 << std::endl;
118 }
119 std::cerr << "Original bus: " << oldBus_->name() << std::endl;
120 ddg().writeToDotFile("cannot_return_old_cycle.dot");
122 for (int i = 0; i < ins->moveCount(); i++) {
123 std::cerr << "\t" << POMDisassembler::disassemble(ins->move(i))
124 << " bus: " << ins->move(i).bus().name()
125 << std::endl;
126 }
127 std::cerr << "ins contains " << ins->immediateCount()
128 << " immediates." << std::endl;
129 assert(false);
130 }
131#endif
134}
135
137#ifdef DEBUG_BUBBLEFISH_SCHEDULER
138 std::cerr << "BFUnscheudleMove undo" << std::endl;
139#endif
141}
142
143bool
148
#define assert(condition)
virtual bool canAssign(int cycle, MoveNode &mn, const TTAMachine::Bus *bus=nullptr, const TTAMachine::FunctionUnit *srcFU=nullptr, const TTAMachine::FunctionUnit *dstFU=nullptr, const TTAMachine::Bus *prologBus=nullptr, int immWriteCycle=-1, int prologImmWriteCycle=-1, const TTAMachine::ImmediateUnit *immu=nullptr, int immRegIndex=-1, bool ignoreGWN=false)
DataDependenceGraph & ddg()
SimpleResourceManager & rm() const
const TTAMachine::FunctionUnit * srcFU_
const TTAMachine::ImmediateUnit * immu_
const TTAMachine::FunctionUnit * dstFU_
const TTAMachine::Bus * oldBus_
virtual void writeToDotFile(const TCEString &fileName) const
int cycle() const
Definition MoveNode.cc:421
ProgramOperation & sourceOperation() const
Definition MoveNode.cc:453
bool isDestinationOperation() const
std::string toString() const
Definition MoveNode.cc:576
TTAProgram::Move & move()
bool isSourceOperation() const
Definition MoveNode.cc:168
ProgramOperation & destinationOperation(unsigned int index=0) const
static std::string disassemble(const TTAProgram::Move &move)
std::string toString() const
virtual void assign(int cycle, MoveNode &node, const TTAMachine::Bus *bus=NULL, const TTAMachine::FunctionUnit *srcFU=NULL, const TTAMachine::FunctionUnit *dstFU=NULL, int immWriteCycle=-1, const TTAMachine::ImmediateUnit *immu=nullptr, int immRegIndex=-1) override
virtual void unassign(MoveNode &node) override
virtual TTAProgram::Instruction * instruction(int cycle) const override
virtual int immediateWriteCycle(const MoveNode &) const
virtual TCEString name() const
Move & move(int i) const
Terminal & source() const
Definition Move.cc:302
Terminal & destination() const
Definition Move.cc:323
const TTAMachine::Bus & bus() const
Definition Move.cc:373
virtual const TTAMachine::FunctionUnit & functionUnit() const
Definition Terminal.cc:251
virtual int index() const
Definition Terminal.cc:274
virtual bool isImmediateRegister() const
Definition Terminal.cc:97
virtual const TTAMachine::ImmediateUnit & immediateUnit() const
Definition Terminal.cc:240